1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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1209
1210 return ret_val;
1211}
1212
1213template <class Impl>
1214void
1215DefaultRename<Impl>::readFreeEntries(ThreadID tid)
1216{
1217 if (fromIEW->iewInfo[tid].usedIQ)
1218 freeEntries[tid].iqEntries = fromIEW->iewInfo[tid].freeIQEntries;
1219
1220 if (fromIEW->iewInfo[tid].usedLSQ)
1221 freeEntries[tid].lsqEntries = fromIEW->iewInfo[tid].freeLSQEntries;
1222
1223 if (fromCommit->commitInfo[tid].usedROB) {
1224 freeEntries[tid].robEntries =
1225 fromCommit->commitInfo[tid].freeROBEntries;
1226 emptyROB[tid] = fromCommit->commitInfo[tid].emptyROB;
1227 }
1228
1229 DPRINTF(Rename, "[tid:%i]: Free IQ: %i, Free ROB: %i, Free LSQ: %i\n",
1230 tid,
1231 freeEntries[tid].iqEntries,
1232 freeEntries[tid].robEntries,
1233 freeEntries[tid].lsqEntries);
1234

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