rename.hh (9444:ab47fe7f03f0) | rename.hh (10239:592f0bb6bd6f) |
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1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2004-2006 The Regents of The University of Michigan | 1/* 2 * Copyright (c) 2012 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated 11 * unmodified and in its entirety in all distributions of the software, 12 * modified or unmodified, in source code or in binary form. 13 * 14 * Copyright (c) 2004-2006 The Regents of The University of Michigan |
15 * Copyright (c) 2013 Advanced Micro Devices, Inc. |
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15 * All rights reserved. 16 * 17 * Redistribution and use in source and binary forms, with or without 18 * modification, are permitted provided that the following conditions are 19 * met: redistributions of source code must retain the above copyright 20 * notice, this list of conditions and the following disclaimer; 21 * redistributions in binary form must reproduce the above copyright 22 * notice, this list of conditions and the following disclaimer in the --- 223 unchanged lines hidden (view full) --- 246 inline void renameDestRegs(DynInstPtr &inst, ThreadID tid); 247 248 /** Calculates the number of free ROB entries for a specific thread. */ 249 inline int calcFreeROBEntries(ThreadID tid); 250 251 /** Calculates the number of free IQ entries for a specific thread. */ 252 inline int calcFreeIQEntries(ThreadID tid); 253 | 16 * All rights reserved. 17 * 18 * Redistribution and use in source and binary forms, with or without 19 * modification, are permitted provided that the following conditions are 20 * met: redistributions of source code must retain the above copyright 21 * notice, this list of conditions and the following disclaimer; 22 * redistributions in binary form must reproduce the above copyright 23 * notice, this list of conditions and the following disclaimer in the --- 223 unchanged lines hidden (view full) --- 247 inline void renameDestRegs(DynInstPtr &inst, ThreadID tid); 248 249 /** Calculates the number of free ROB entries for a specific thread. */ 250 inline int calcFreeROBEntries(ThreadID tid); 251 252 /** Calculates the number of free IQ entries for a specific thread. */ 253 inline int calcFreeIQEntries(ThreadID tid); 254 |
254 /** Calculates the number of free LSQ entries for a specific thread. */ 255 inline int calcFreeLSQEntries(ThreadID tid); | 255 /** Calculates the number of free LQ entries for a specific thread. */ 256 inline int calcFreeLQEntries(ThreadID tid); |
256 | 257 |
258 /** Calculates the number of free SQ entries for a specific thread. */ 259 inline int calcFreeSQEntries(ThreadID tid); 260 |
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257 /** Returns the number of valid instructions coming from decode. */ 258 unsigned validInsts(); 259 260 /** Reads signals telling rename to block/unblock. */ 261 void readStallSignals(ThreadID tid); 262 263 /** Checks if any stages are telling rename to block. */ 264 bool checkStall(ThreadID tid); --- 85 unchanged lines hidden (view full) --- 350 /** Pointer to the scoreboard. */ 351 Scoreboard *scoreboard; 352 353 /** Count of instructions in progress that have been sent off to the IQ 354 * and ROB, but are not yet included in their occupancy counts. 355 */ 356 int instsInProgress[Impl::MaxThreads]; 357 | 261 /** Returns the number of valid instructions coming from decode. */ 262 unsigned validInsts(); 263 264 /** Reads signals telling rename to block/unblock. */ 265 void readStallSignals(ThreadID tid); 266 267 /** Checks if any stages are telling rename to block. */ 268 bool checkStall(ThreadID tid); --- 85 unchanged lines hidden (view full) --- 354 /** Pointer to the scoreboard. */ 355 Scoreboard *scoreboard; 356 357 /** Count of instructions in progress that have been sent off to the IQ 358 * and ROB, but are not yet included in their occupancy counts. 359 */ 360 int instsInProgress[Impl::MaxThreads]; 361 |
362 /** Count of Load instructions in progress that have been sent off to the IQ 363 * and ROB, but are not yet included in their occupancy counts. 364 */ 365 int loadsInProgress[Impl::MaxThreads]; 366 367 /** Count of Store instructions in progress that have been sent off to the IQ 368 * and ROB, but are not yet included in their occupancy counts. 369 */ 370 int storesInProgress[Impl::MaxThreads]; 371 |
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358 /** Variable that tracks if decode has written to the time buffer this 359 * cycle. Used to tell CPU if there is activity this cycle. 360 */ 361 bool wroteToTimeBuffer; 362 363 /** Structures whose free entries impact the amount of instructions that 364 * can be renamed. 365 */ 366 struct FreeEntries { 367 unsigned iqEntries; | 372 /** Variable that tracks if decode has written to the time buffer this 373 * cycle. Used to tell CPU if there is activity this cycle. 374 */ 375 bool wroteToTimeBuffer; 376 377 /** Structures whose free entries impact the amount of instructions that 378 * can be renamed. 379 */ 380 struct FreeEntries { 381 unsigned iqEntries; |
368 unsigned lsqEntries; | |
369 unsigned robEntries; | 382 unsigned robEntries; |
383 unsigned lqEntries; 384 unsigned sqEntries; |
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370 }; 371 372 /** Per-thread tracking of the number of free entries of back-end 373 * structures. 374 */ 375 FreeEntries freeEntries[Impl::MaxThreads]; 376 377 /** Records if the ROB is empty. In SMT mode the ROB may be dynamically --- 61 unchanged lines hidden (view full) --- 439 PhysRegIndex maxPhysicalRegs; 440 441 /** Enum to record the source of a structure full stall. Can come from 442 * either ROB, IQ, LSQ, and it is priortized in that order. 443 */ 444 enum FullSource { 445 ROB, 446 IQ, | 385 }; 386 387 /** Per-thread tracking of the number of free entries of back-end 388 * structures. 389 */ 390 FreeEntries freeEntries[Impl::MaxThreads]; 391 392 /** Records if the ROB is empty. In SMT mode the ROB may be dynamically --- 61 unchanged lines hidden (view full) --- 454 PhysRegIndex maxPhysicalRegs; 455 456 /** Enum to record the source of a structure full stall. Can come from 457 * either ROB, IQ, LSQ, and it is priortized in that order. 458 */ 459 enum FullSource { 460 ROB, 461 IQ, |
447 LSQ, | 462 LQ, 463 SQ, |
448 NONE 449 }; 450 451 /** Function used to increment the stat that corresponds to the source of 452 * the stall. 453 */ 454 inline void incrFullStat(const FullSource &source); 455 --- 12 unchanged lines hidden (view full) --- 468 /** Stat for total number of renamed instructions. */ 469 Stats::Scalar renameRenamedInsts; 470 /** Stat for total number of squashed instructions that rename discards. */ 471 Stats::Scalar renameSquashedInsts; 472 /** Stat for total number of times that the ROB starts a stall in rename. */ 473 Stats::Scalar renameROBFullEvents; 474 /** Stat for total number of times that the IQ starts a stall in rename. */ 475 Stats::Scalar renameIQFullEvents; | 464 NONE 465 }; 466 467 /** Function used to increment the stat that corresponds to the source of 468 * the stall. 469 */ 470 inline void incrFullStat(const FullSource &source); 471 --- 12 unchanged lines hidden (view full) --- 484 /** Stat for total number of renamed instructions. */ 485 Stats::Scalar renameRenamedInsts; 486 /** Stat for total number of squashed instructions that rename discards. */ 487 Stats::Scalar renameSquashedInsts; 488 /** Stat for total number of times that the ROB starts a stall in rename. */ 489 Stats::Scalar renameROBFullEvents; 490 /** Stat for total number of times that the IQ starts a stall in rename. */ 491 Stats::Scalar renameIQFullEvents; |
476 /** Stat for total number of times that the LSQ starts a stall in rename. */ 477 Stats::Scalar renameLSQFullEvents; | 492 /** Stat for total number of times that the LQ starts a stall in rename. */ 493 Stats::Scalar renameLQFullEvents; 494 /** Stat for total number of times that the SQ starts a stall in rename. */ 495 Stats::Scalar renameSQFullEvents; |
478 /** Stat for total number of times that rename runs out of free registers 479 * to use to rename. */ 480 Stats::Scalar renameFullRegistersEvents; 481 /** Stat for total number of renamed destination registers. */ 482 Stats::Scalar renameRenamedOperands; 483 /** Stat for total number of source register rename lookups. */ 484 Stats::Scalar renameRenameLookups; 485 Stats::Scalar intRenameLookups; --- 14 unchanged lines hidden --- | 496 /** Stat for total number of times that rename runs out of free registers 497 * to use to rename. */ 498 Stats::Scalar renameFullRegistersEvents; 499 /** Stat for total number of renamed destination registers. */ 500 Stats::Scalar renameRenamedOperands; 501 /** Stat for total number of source register rename lookups. */ 502 Stats::Scalar renameRenameLookups; 503 Stats::Scalar intRenameLookups; --- 14 unchanged lines hidden --- |