rename.hh (10239:592f0bb6bd6f) rename.hh (10378:a3e23d599e11)
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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81 typedef typename CPUPol::RenameMap RenameMap;
82 // These are used only for initialization.
83 typedef typename CPUPol::IEW IEW;
84 typedef typename CPUPol::Commit Commit;
85
86 // Typedefs from the ISA.
87 typedef TheISA::RegIndex RegIndex;
88
1/*
2 * Copyright (c) 2012 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 72 unchanged lines hidden (view full) ---

81 typedef typename CPUPol::RenameMap RenameMap;
82 // These are used only for initialization.
83 typedef typename CPUPol::IEW IEW;
84 typedef typename CPUPol::Commit Commit;
85
86 // Typedefs from the ISA.
87 typedef TheISA::RegIndex RegIndex;
88
89 // A list is used to queue the instructions. Barrier insts must
90 // be added to the front of the list, which is the only reason for
91 // using a list instead of a queue. (Most other stages use a
89 // A deque is used to queue the instructions. Barrier insts must
90 // be added to the front of the queue, which is the only reason for
91 // using a deque instead of a queue. (Most other stages use a
92 // queue)
92 // queue)
93 typedef std::list<DynInstPtr> InstQueue;
94 typedef typename std::list<DynInstPtr>::iterator ListIt;
93 typedef std::deque<DynInstPtr> InstQueue;
95
96 public:
97 /** Overall rename status. Used to determine if the CPU can
98 * deschedule itself due to a lack of activity.
99 */
100 enum RenameStatus {
101 Active,
102 Inactive

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94
95 public:
96 /** Overall rename status. Used to determine if the CPU can
97 * deschedule itself due to a lack of activity.
98 */
99 enum RenameStatus {
100 Active,
101 Inactive

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