1/* |
2 * Copyright (c) 2012, 2017 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 498 unchanged lines hidden (view full) --- 509 Stats::Scalar renameFullRegistersEvents; 510 /** Stat for total number of renamed destination registers. */ 511 Stats::Scalar renameRenamedOperands; 512 /** Stat for total number of source register rename lookups. */ 513 Stats::Scalar renameRenameLookups; 514 Stats::Scalar intRenameLookups; 515 Stats::Scalar fpRenameLookups; 516 Stats::Scalar vecRenameLookups; |
517 Stats::Scalar vecPredRenameLookups; |
518 /** Stat for total number of committed renaming mappings. */ 519 Stats::Scalar renameCommittedMaps; 520 /** Stat for total number of mappings that were undone due to a squash. */ 521 Stats::Scalar renameUndoneMaps; 522 /** Number of serialize instructions handled. */ 523 Stats::Scalar renamedSerializing; 524 /** Number of instructions marked as temporarily serializing. */ 525 Stats::Scalar renamedTempSerializing; 526 /** Number of instructions inserted into skid buffers. */ 527 Stats::Scalar renameSkidInsts; 528}; 529 530#endif // __CPU_O3_RENAME_HH__ |