1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 50 unchanged lines hidden (view full) --- 59 60 typedef union { 61 FloatReg d; 62 FloatRegBits q; 63 } PhysFloatReg; 64 65 /** Integer register file. */ 66 std::vector<IntReg> intRegFile; |
67 std::vector<PhysRegId> intRegIds; |
68 69 /** Floating point register file. */ 70 std::vector<PhysFloatReg> floatRegFile; |
71 std::vector<PhysRegId> floatRegIds; |
72 73 /** Condition-code register file. */ 74 std::vector<CCReg> ccRegFile; |
75 std::vector<PhysRegId> ccRegIds; |
76 |
77 /** Misc Reg Ids */ 78 std::vector<PhysRegId> miscRegIds; 79 |
80 /** |
81 * Number of physical general purpose registers |
82 */ |
83 unsigned numPhysicalIntRegs; |
84 85 /** |
86 * Number of physical general purpose registers |
87 */ |
88 unsigned numPhysicalFloatRegs; |
89 |
90 /** 91 * Number of physical general purpose registers 92 */ 93 unsigned numPhysicalCCRegs; 94 |
95 /** Total number of physical registers. */ 96 unsigned totalNumRegs; 97 98 public: 99 /** 100 * Constructs a physical register file with the specified amount of 101 * integer and floating point registers. 102 */ --- 5 unchanged lines hidden (view full) --- 108 * Destructor to free resources 109 */ 110 ~PhysRegFile() {} 111 112 /** Initialize the free list */ 113 void initFreeList(UnifiedFreeList *freeList); 114 115 /** @return the number of integer physical registers. */ |
116 unsigned numIntPhysRegs() const { return numPhysicalIntRegs; } |
117 118 /** @return the number of floating-point physical registers. */ |
119 unsigned numFloatPhysRegs() const { return numPhysicalFloatRegs; } |
120 121 /** @return the number of condition-code physical registers. */ |
122 unsigned numCCPhysRegs() const { return numPhysicalCCRegs; } |
123 124 /** @return the total number of physical registers. */ 125 unsigned totalNumPhysRegs() const { return totalNumRegs; } 126 |
127 /** Gets a misc register PhysRegIdPtr. */ 128 PhysRegIdPtr getMiscRegId(RegIndex reg_idx) { 129 return &miscRegIds[reg_idx]; |
130 } 131 |
132 /** Reads an integer register. */ |
133 uint64_t readIntReg(PhysRegIdPtr phys_reg) const |
134 { |
135 assert(phys_reg->isIntPhysReg()); |
136 137 DPRINTF(IEW, "RegFile: Access to int register %i, has data " |
138 "%#x\n", phys_reg->regIdx, intRegFile[phys_reg->regIdx]); 139 return intRegFile[phys_reg->regIdx]; |
140 } 141 142 /** Reads a floating point register (double precision). */ |
143 FloatReg readFloatReg(PhysRegIdPtr phys_reg) const |
144 { |
145 assert(phys_reg->isFloatPhysReg()); |
146 |
147 DPRINTF(IEW, "RegFile: Access to float register %i, has " |
148 "data %#x\n", phys_reg->regIdx, 149 floatRegFile[phys_reg->regIdx].q); |
150 |
151 return floatRegFile[phys_reg->regIdx].d; |
152 } 153 |
154 FloatRegBits readFloatRegBits(PhysRegIdPtr phys_reg) const |
155 { |
156 assert(phys_reg->isFloatPhysReg()); |
157 |
158 FloatRegBits floatRegBits = floatRegFile[phys_reg->regIdx].q; |
159 |
160 DPRINTF(IEW, "RegFile: Access to float register %i as int, " |
161 "has data %#x\n", phys_reg->regIdx, 162 (uint64_t)floatRegBits); |
163 164 return floatRegBits; 165 } 166 167 /** Reads a condition-code register. */ |
168 CCReg readCCReg(PhysRegIdPtr phys_reg) |
169 { |
170 assert(phys_reg->isCCPhysReg()); |
171 |
172 DPRINTF(IEW, "RegFile: Access to cc register %i, has " |
173 "data %#x\n", phys_reg->regIdx, 174 ccRegFile[phys_reg->regIdx]); |
175 |
176 return ccRegFile[phys_reg->regIdx]; |
177 } 178 179 /** Sets an integer register to the given value. */ |
180 void setIntReg(PhysRegIdPtr phys_reg, uint64_t val) |
181 { |
182 assert(phys_reg->isIntPhysReg()); |
183 184 DPRINTF(IEW, "RegFile: Setting int register %i to %#x\n", |
185 phys_reg->regIdx, val); |
186 |
187 if (!phys_reg->isZeroReg()) 188 intRegFile[phys_reg->regIdx] = val; |
189 } 190 191 /** Sets a double precision floating point register to the given value. */ |
192 void setFloatReg(PhysRegIdPtr phys_reg, FloatReg val) |
193 { |
194 assert(phys_reg->isFloatPhysReg()); |
195 |
196 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", |
197 phys_reg->regIdx, (uint64_t)val); |
198 |
199 if (!phys_reg->isZeroReg()) 200 floatRegFile[phys_reg->regIdx].d = val; |
201 } 202 |
203 void setFloatRegBits(PhysRegIdPtr phys_reg, FloatRegBits val) |
204 { |
205 assert(phys_reg->isFloatPhysReg()); |
206 |
207 DPRINTF(IEW, "RegFile: Setting float register %i to %#x\n", |
208 phys_reg->regIdx, (uint64_t)val); |
209 |
210 floatRegFile[phys_reg->regIdx].q = val; |
211 } 212 213 /** Sets a condition-code register to the given value. */ |
214 void setCCReg(PhysRegIdPtr phys_reg, CCReg val) |
215 { |
216 assert(phys_reg->isCCPhysReg()); |
217 |
218 DPRINTF(IEW, "RegFile: Setting cc register %i to %#x\n", |
219 phys_reg->regIdx, (uint64_t)val); |
220 |
221 ccRegFile[phys_reg->regIdx] = val; |
222 } 223}; 224 225 226#endif //__CPU_O3_REGFILE_HH__ |