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< * Copyright (c) 2016 ARM Limited
---
> * Copyright (c) 2016-2017 ARM Limited
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> using VecPredRegContainer = TheISA::VecPredRegContainer;
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> /** Predicate register file. */
> std::vector<VecPredRegContainer> vecPredRegFile;
> std::vector<PhysRegId> vecPredRegIds;
>
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> * Number of physical predicate registers
> */
> unsigned numPhysicalVecPredRegs;
>
> /**
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> unsigned _numPhysicalVecPredRegs,
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> /** @return the number of predicate physical registers. */
> unsigned numPredPhysRegs() const { return numPhysicalVecPredRegs; }
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< vectorRegFile[phys_reg->index()].as<VecElem>().print());
---
> vectorRegFile[phys_reg->index()].print());
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> /** Reads a predicate register. */
> const VecPredRegContainer& readVecPredReg(PhysRegIdPtr phys_reg) const
> {
> assert(phys_reg->isVecPredPhysReg());
>
> DPRINTF(IEW, "RegFile: Access to predicate register %i, has "
> "data %s\n", int(phys_reg->index()),
> vecPredRegFile[phys_reg->index()].print());
>
> return vecPredRegFile[phys_reg->index()];
> }
>
> VecPredRegContainer& getWritableVecPredReg(PhysRegIdPtr phys_reg)
> {
> /* const_cast for not duplicating code above. */
> return const_cast<VecPredRegContainer&>(readVecPredReg(phys_reg));
> }
>
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> /** Sets a predicate register to the given value. */
> void setVecPredReg(PhysRegIdPtr phys_reg, const VecPredRegContainer& val)
> {
> assert(phys_reg->isVecPredPhysReg());
>
> DPRINTF(IEW, "RegFile: Setting predicate register %i to %s\n",
> int(phys_reg->index()), val.print());
>
> vecPredRegFile[phys_reg->index()] = val;
> }
>