1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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32 */
33
34#include "cpu/o3/free_list.hh"
35#include "cpu/o3/regfile.hh"
36
37
38PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs,
39 unsigned _numPhysicalFloatRegs,
40 unsigned _numPhysicalCCRegs,
41 unsigned _numPhysicalVectorRegs)
40 unsigned _numPhysicalCCRegs)
41 : intRegFile(_numPhysicalIntRegs),
42 floatRegFile(_numPhysicalFloatRegs),
43 ccRegFile(_numPhysicalCCRegs),
45 vectorRegFile(_numPhysicalVectorRegs),
44 baseFloatRegIndex(_numPhysicalIntRegs),
45 baseCCRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs),
48 baseVectorRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs
49 + _numPhysicalCCRegs),
46 totalNumRegs(_numPhysicalIntRegs
47 + _numPhysicalFloatRegs
52 + _numPhysicalCCRegs
53 + _numPhysicalVectorRegs)
48 + _numPhysicalCCRegs)
49{
50 if (TheISA::NumCCRegs == 0 && _numPhysicalCCRegs != 0) {
51 // Just make this a warning and go ahead and allocate them
52 // anyway, to keep from having to add checks everywhere
53 warn("Non-zero number of physical CC regs specified, even though\n"
54 " ISA does not use them.\n");
55 }
61
62 if (TheISA::NumVectorRegs == 0 && _numPhysicalVectorRegs != 0) {
63 // Just make this a warning and go ahead and allocate them
64 // anyway, to keep from having to add checks everywhere
65 warn("Non-zero number of physical vector regs specified, even though\n"
66 " ISA does not use them.\n");
67 }
56}
57
58
59void
60PhysRegFile::initFreeList(UnifiedFreeList *freeList)
61{
62 // Initialize the free lists.
63 PhysRegIndex reg_idx = 0;

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68 }
69
70 // The next batch of the registers are the floating-point physical
71 // registers; put them onto the floating-point free list.
72 while (reg_idx < baseCCRegIndex) {
73 freeList->addFloatReg(reg_idx++);
74 }
75
88 // The next batch of registers are the condition-code physical
76 // The rest of the registers are the condition-code physical
77 // registers; put them onto the condition-code free list.
90 while (reg_idx < baseVectorRegIndex) {
78 while (reg_idx < totalNumRegs) {
79 freeList->addCCReg(reg_idx++);
80 }
93
94 // The rest of the registers are the vector physical
95 // registers; put them onto the vector free list.
96 while (reg_idx < totalNumRegs) {
97 freeList->addVectorReg(reg_idx++);
98 }
81}