1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright

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32 */
33
34#include "cpu/o3/free_list.hh"
35#include "cpu/o3/regfile.hh"
36
37
38PhysRegFile::PhysRegFile(unsigned _numPhysicalIntRegs,
39 unsigned _numPhysicalFloatRegs,
40 unsigned _numPhysicalCCRegs,
41 unsigned _numPhysicalVectorRegs)
42 : intRegFile(_numPhysicalIntRegs),
43 floatRegFile(_numPhysicalFloatRegs),
44 ccRegFile(_numPhysicalCCRegs),
45 vectorRegFile(_numPhysicalVectorRegs),
46 baseFloatRegIndex(_numPhysicalIntRegs),
47 baseCCRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs),
48 baseVectorRegIndex(_numPhysicalIntRegs + _numPhysicalFloatRegs
49 + _numPhysicalCCRegs),
50 totalNumRegs(_numPhysicalIntRegs
51 + _numPhysicalFloatRegs
52 + _numPhysicalCCRegs
53 + _numPhysicalVectorRegs)
54{
55 if (TheISA::NumCCRegs == 0 && _numPhysicalCCRegs != 0) {
56 // Just make this a warning and go ahead and allocate them
57 // anyway, to keep from having to add checks everywhere
58 warn("Non-zero number of physical CC regs specified, even though\n"
59 " ISA does not use them.\n");
60 }
61
62 if (TheISA::NumVectorRegs == 0 && _numPhysicalVectorRegs != 0) {
63 // Just make this a warning and go ahead and allocate them
64 // anyway, to keep from having to add checks everywhere
65 warn("Non-zero number of physical vector regs specified, even though\n"
66 " ISA does not use them.\n");
67 }
68}
69
70
71void
72PhysRegFile::initFreeList(UnifiedFreeList *freeList)
73{
74 // Initialize the free lists.
75 PhysRegIndex reg_idx = 0;

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80 }
81
82 // The next batch of the registers are the floating-point physical
83 // registers; put them onto the floating-point free list.
84 while (reg_idx < baseCCRegIndex) {
85 freeList->addFloatReg(reg_idx++);
86 }
87
88 // The next batch of registers are the condition-code physical
89 // registers; put them onto the condition-code free list.
90 while (reg_idx < baseVectorRegIndex) {
91 freeList->addCCReg(reg_idx++);
92 }
93
94 // The rest of the registers are the vector physical
95 // registers; put them onto the vector free list.
96 while (reg_idx < totalNumRegs) {
97 freeList->addVectorReg(reg_idx++);
98 }
99}