mem_dep_unit_impl.hh (2678:1f86b91dc3bb) mem_dep_unit_impl.hh (3125:febd811bccc6)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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104 .name(name() + ".memDep.conflictingStores")
105 .desc("Number of conflicting stores.");
106}
107
108template <class MemDepPred, class Impl>
109void
110MemDepUnit<MemDepPred, Impl>::switchOut()
111{
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 95 unchanged lines hidden (view full) ---

104 .name(name() + ".memDep.conflictingStores")
105 .desc("Number of conflicting stores.");
106}
107
108template <class MemDepPred, class Impl>
109void
110MemDepUnit<MemDepPred, Impl>::switchOut()
111{
112 assert(instList[0].empty());
113 assert(instsToReplay.empty());
114 assert(memDepHash.empty());
112 // Clear any state.
113 for (int i = 0; i < Impl::MaxThreads; ++i) {
114 instList[i].clear();
115 }
116 instsToReplay.clear();
117 memDepHash.clear();
118}
119

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115 // Clear any state.
116 for (int i = 0; i < Impl::MaxThreads; ++i) {
117 instList[i].clear();
118 }
119 instsToReplay.clear();
120 memDepHash.clear();
121}
122

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