408c408,409
<
---
> DPRINTF(MemDepUnit, "barrier completed: %s SN:%lli\n", inst->pcState(),
> inst->seqNum);
410d410
< assert(loadBarrier && storeBarrier);
416d415
< assert(storeBarrier);
482a482,487
> if ((*squash_it)->seqNum == loadBarrierSN)
> loadBarrier = false;
>
> if ((*squash_it)->seqNum == storeBarrierSN)
> storeBarrier = false;
>
512c517
< depPred.violation(violating_load->instAddr(), store_inst->instAddr());
---
> depPred.violation(store_inst->instAddr(), violating_load->instAddr());