lsq_unit_impl.hh (7823:dac01f14f20f) lsq_unit_impl.hh (7848:cc5e64f8423f)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 444 unchanged lines hidden (view full) ---

453
454 // If the instruction faulted or predicated false, then we need to send it
455 // along to commit without the instruction completing.
456 if (load_fault != NoFault || inst->readPredicate() == false) {
457 // Send this instruction to commit, also make sure iew stage
458 // realizes there is activity.
459 // Mark it as executed unless it is an uncached load that
460 // needs to hit the head of commit.
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 444 unchanged lines hidden (view full) ---

453
454 // If the instruction faulted or predicated false, then we need to send it
455 // along to commit without the instruction completing.
456 if (load_fault != NoFault || inst->readPredicate() == false) {
457 // Send this instruction to commit, also make sure iew stage
458 // realizes there is activity.
459 // Mark it as executed unless it is an uncached load that
460 // needs to hit the head of commit.
461 if (inst->readPredicate() == false)
462 inst->forwardOldRegs();
461 DPRINTF(LSQUnit, "Load [sn:%lli] not executed from %s\n",
462 inst->seqNum,
463 (load_fault != NoFault ? "fault" : "predication"));
464 if (!(inst->hasRequest() && inst->uncacheable()) ||
465 inst->isAtCommit()) {
466 inst->setExecuted();
467 }
468 iewStage->instToCommit(inst);

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525 assert(!store_inst->isSquashed());
526
527 // Check the recently completed loads to see if any match this store's
528 // address. If so, then we have a memory ordering violation.
529 int load_idx = store_inst->lqIdx;
530
531 Fault store_fault = store_inst->initiateAcc();
532
463 DPRINTF(LSQUnit, "Load [sn:%lli] not executed from %s\n",
464 inst->seqNum,
465 (load_fault != NoFault ? "fault" : "predication"));
466 if (!(inst->hasRequest() && inst->uncacheable()) ||
467 inst->isAtCommit()) {
468 inst->setExecuted();
469 }
470 iewStage->instToCommit(inst);

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527 assert(!store_inst->isSquashed());
528
529 // Check the recently completed loads to see if any match this store's
530 // address. If so, then we have a memory ordering violation.
531 int load_idx = store_inst->lqIdx;
532
533 Fault store_fault = store_inst->initiateAcc();
534
535 if (store_inst->readPredicate() == false)
536 store_inst->forwardOldRegs();
537
533 if (storeQueue[store_idx].size == 0) {
534 DPRINTF(LSQUnit,"Fault on Store PC %s, [sn:%lli], Size = 0\n",
535 store_inst->pcState(), store_inst->seqNum);
536
537 return store_fault;
538 } else if (store_inst->readPredicate() == false) {
539 DPRINTF(LSQUnit, "Store [sn:%lli] not executed from predication\n",
540 store_inst->seqNum);

--- 640 unchanged lines hidden --- 		538 if (storeQueue[store_idx].size == 0) {
539 DPRINTF(LSQUnit,"Fault on Store PC %s, [sn:%lli], Size = 0\n",
540 store_inst->pcState(), store_inst->seqNum);
541
542 return store_fault;
543 } else if (store_inst->readPredicate() == false) {
544 DPRINTF(LSQUnit, "Store [sn:%lli] not executed from predication\n",
545 store_inst->seqNum);

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