lsq_unit_impl.hh (7600:eff7f79f7dfd) | lsq_unit_impl.hh (7616:1a0ab2308bbe) |
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1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 465 unchanged lines hidden (view full) --- 474 while (load_idx != loadTail) { 475 // Really only need to check loads that have actually executed 476 477 // @todo: For now this is extra conservative, detecting a 478 // violation if the addresses match assuming all accesses 479 // are quad word accesses. 480 481 // @todo: Fix this, magic number being used here | 1/* 2 * Copyright (c) 2010 ARM Limited 3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 465 unchanged lines hidden (view full) --- 474 while (load_idx != loadTail) { 475 // Really only need to check loads that have actually executed 476 477 // @todo: For now this is extra conservative, detecting a 478 // violation if the addresses match assuming all accesses 479 // are quad word accesses. 480 481 // @todo: Fix this, magic number being used here |
482 483 // @todo: Uncachable load is not executed until it reaches 484 // the head of the ROB. Once this if checks only the executed 485 // loads(as noted above), this check can be removed |
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482 if (loadQueue[load_idx]->effAddrValid && | 486 if (loadQueue[load_idx]->effAddrValid && |
483 (loadQueue[load_idx]->effAddr >> 8) == 484 (inst->effAddr >> 8)) { | 487 ((loadQueue[load_idx]->effAddr >> 8) 488 == (inst->effAddr >> 8)) && 489 !loadQueue[load_idx]->uncacheable()) { |
485 // A load incorrectly passed this load. Squash and refetch. 486 // For now return a fault to show that it was unsuccessful. 487 DynInstPtr violator = loadQueue[load_idx]; 488 if (!memDepViolator || 489 (violator->seqNum < memDepViolator->seqNum)) { 490 memDepViolator = violator; 491 } else { 492 break; --- 55 unchanged lines hidden (view full) --- 548 // It's safe to check all loads because effAddr is set to 549 // InvalAddr when the dyn inst is created. 550 551 // @todo: For now this is extra conservative, detecting a 552 // violation if the addresses match assuming all accesses 553 // are quad word accesses. 554 555 // @todo: Fix this, magic number being used here | 490 // A load incorrectly passed this load. Squash and refetch. 491 // For now return a fault to show that it was unsuccessful. 492 DynInstPtr violator = loadQueue[load_idx]; 493 if (!memDepViolator || 494 (violator->seqNum < memDepViolator->seqNum)) { 495 memDepViolator = violator; 496 } else { 497 break; --- 55 unchanged lines hidden (view full) --- 553 // It's safe to check all loads because effAddr is set to 554 // InvalAddr when the dyn inst is created. 555 556 // @todo: For now this is extra conservative, detecting a 557 // violation if the addresses match assuming all accesses 558 // are quad word accesses. 559 560 // @todo: Fix this, magic number being used here |
561 562 // @todo: Uncachable load is not executed until it reaches 563 // the head of the ROB. Once this if checks only the executed 564 // loads(as noted above), this check can be removed |
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556 if (loadQueue[load_idx]->effAddrValid && | 565 if (loadQueue[load_idx]->effAddrValid && |
557 (loadQueue[load_idx]->effAddr >> 8) == 558 (store_inst->effAddr >> 8)) { | 566 ((loadQueue[load_idx]->effAddr >> 8) 567 == (store_inst->effAddr >> 8)) && 568 !loadQueue[load_idx]->uncacheable()) { |
559 // A load incorrectly passed this store. Squash and refetch. 560 // For now return a fault to show that it was unsuccessful. 561 DynInstPtr violator = loadQueue[load_idx]; 562 if (!memDepViolator || 563 (violator->seqNum < memDepViolator->seqNum)) { 564 memDepViolator = violator; 565 } else { 566 break; --- 600 unchanged lines hidden --- | 569 // A load incorrectly passed this store. Squash and refetch. 570 // For now return a fault to show that it was unsuccessful. 571 DynInstPtr violator = loadQueue[load_idx]; 572 if (!memDepViolator || 573 (violator->seqNum < memDepViolator->seqNum)) { 574 memDepViolator = violator; 575 } else { 576 break; --- 600 unchanged lines hidden --- |