lsq_unit_impl.hh (2693:18c6be231eb1) lsq_unit_impl.hh (2698:d5f35d41e017)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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61
62template<class Impl>
63void
64LSQUnit<Impl>::completeDataAccess(PacketPtr pkt)
65{
66 LSQSenderState *state = dynamic_cast<LSQSenderState *>(pkt->senderState);
67 DynInstPtr inst = state->inst;
68 DPRINTF(IEW, "Writeback event [sn:%lli]\n", inst->seqNum);
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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61
62template<class Impl>
63void
64LSQUnit<Impl>::completeDataAccess(PacketPtr pkt)
65{
66 LSQSenderState *state = dynamic_cast<LSQSenderState *>(pkt->senderState);
67 DynInstPtr inst = state->inst;
68 DPRINTF(IEW, "Writeback event [sn:%lli]\n", inst->seqNum);
69// DPRINTF(Activity, "Activity: Ld Writeback event [sn:%lli]\n", inst->seqNum);
69 DPRINTF(Activity, "Activity: Writeback event [sn:%lli]\n", inst->seqNum);
70
71 //iewStage->ldstQueue.removeMSHR(inst->threadNumber,inst->seqNum);
72
73 if (isSwitchedOut() || inst->isSquashed()) {
74 delete state;
75 delete pkt;
76 return;
77 } else {

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204
205template<class Impl>
206void
207LSQUnit<Impl>::clearSQ()
208{
209 storeQueue.clear();
210}
211
70
71 //iewStage->ldstQueue.removeMSHR(inst->threadNumber,inst->seqNum);
72
73 if (isSwitchedOut() || inst->isSquashed()) {
74 delete state;
75 delete pkt;
76 return;
77 } else {

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204
205template<class Impl>
206void
207LSQUnit<Impl>::clearSQ()
208{
209 storeQueue.clear();
210}
211
212#if 0
213template<class Impl>
214void
212template<class Impl>
213void
215LSQUnit<Impl>::setPageTable(PageTable *pt_ptr)
216{
217 DPRINTF(LSQUnit, "Setting the page table pointer.\n");
218 pTable = pt_ptr;
219}
220#endif
221
222template<class Impl>
223void
224LSQUnit<Impl>::switchOut()
225{
226 switchedOut = true;
227 for (int i = 0; i < loadQueue.size(); ++i)
228 loadQueue[i] = NULL;
229
230 assert(storesToWB == 0);
231}

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623 // Non-store conditionals do not need a writeback.
624 state->noWB = true;
625 }
626
627 if (!dcachePort->sendTiming(data_pkt)) {
628 // Need to handle becoming blocked on a store.
629 isStoreBlocked = true;
630
214LSQUnit<Impl>::switchOut()
215{
216 switchedOut = true;
217 for (int i = 0; i < loadQueue.size(); ++i)
218 loadQueue[i] = NULL;
219
220 assert(storesToWB == 0);
221}

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613 // Non-store conditionals do not need a writeback.
614 state->noWB = true;
615 }
616
617 if (!dcachePort->sendTiming(data_pkt)) {
618 // Need to handle becoming blocked on a store.
619 isStoreBlocked = true;
620
631 assert(sendingPkt == NULL);
632 sendingPkt = data_pkt;
621 assert(retryPkt == NULL);
622 retryPkt = data_pkt;
633 } else {
634 storePostSend(data_pkt);
635 }
636 }
637
638 // Not sure this should set it to 0.
639 usedPorts = 0;
640

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853 cpu->checker->tick(storeQueue[store_idx].inst);
854 }
855}
856
857template <class Impl>
858void
859LSQUnit<Impl>::recvRetry()
860{
623 } else {
624 storePostSend(data_pkt);
625 }
626 }
627
628 // Not sure this should set it to 0.
629 usedPorts = 0;
630

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843 cpu->checker->tick(storeQueue[store_idx].inst);
844 }
845}
846
847template <class Impl>
848void
849LSQUnit<Impl>::recvRetry()
850{
861 assert(sendingPkt != NULL);
862
863 if (isStoreBlocked) {
851 if (isStoreBlocked) {
864 if (dcachePort->sendTiming(sendingPkt)) {
865 storePostSend(sendingPkt);
852 assert(retryPkt != NULL);
853
854 if (dcachePort->sendTiming(retryPkt)) {
855 storePostSend(retryPkt);
866 sendingPkt = NULL;
867 isStoreBlocked = false;
868 } else {
869 // Still blocked!
870 }
871 } else if (isLoadBlocked) {
872 DPRINTF(LSQUnit, "Loads squash themselves and all younger insts, "
873 "no need to resend packet.\n");

--- 66 unchanged lines hidden --- 		856 sendingPkt = NULL;
857 isStoreBlocked = false;
858 } else {
859 // Still blocked!
860 }
861 } else if (isLoadBlocked) {
862 DPRINTF(LSQUnit, "Loads squash themselves and all younger insts, "
863 "no need to resend packet.\n");

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