lsq_unit_impl.hh (10175:e639ff917d2e) lsq_unit_impl.hh (10231:cb2e6950956d)
1
2/*
3 * Copyright (c) 2010-2013 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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607 load_fault = inst->initiateAcc();
608
609 if (inst->isTranslationDelayed() &&
610 load_fault == NoFault)
611 return load_fault;
612
613 // If the instruction faulted or predicated false, then we need to send it
614 // along to commit without the instruction completing.
1
2/*
3 * Copyright (c) 2010-2013 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 598 unchanged lines hidden (view full) ---

607 load_fault = inst->initiateAcc();
608
609 if (inst->isTranslationDelayed() &&
610 load_fault == NoFault)
611 return load_fault;
612
613 // If the instruction faulted or predicated false, then we need to send it
614 // along to commit without the instruction completing.
615 if (load_fault != NoFault || inst->readPredicate() == false) {
615 if (load_fault != NoFault || !inst->readPredicate()) {
616 // Send this instruction to commit, also make sure iew stage
617 // realizes there is activity.
618 // Mark it as executed unless it is an uncached load that
619 // needs to hit the head of commit.
616 // Send this instruction to commit, also make sure iew stage
617 // realizes there is activity.
618 // Mark it as executed unless it is an uncached load that
619 // needs to hit the head of commit.
620 if (inst->readPredicate() == false)
620 if (!inst->readPredicate())
621 inst->forwardOldRegs();
622 DPRINTF(LSQUnit, "Load [sn:%lli] not executed from %s\n",
623 inst->seqNum,
624 (load_fault != NoFault ? "fault" : "predication"));
625 if (!(inst->hasRequest() && inst->uncacheable()) ||
626 inst->isAtCommit()) {
627 inst->setExecuted();
628 }

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660 int load_idx = store_inst->lqIdx;
661
662 Fault store_fault = store_inst->initiateAcc();
663
664 if (store_inst->isTranslationDelayed() &&
665 store_fault == NoFault)
666 return store_fault;
667
621 inst->forwardOldRegs();
622 DPRINTF(LSQUnit, "Load [sn:%lli] not executed from %s\n",
623 inst->seqNum,
624 (load_fault != NoFault ? "fault" : "predication"));
625 if (!(inst->hasRequest() && inst->uncacheable()) ||
626 inst->isAtCommit()) {
627 inst->setExecuted();
628 }

--- 31 unchanged lines hidden (view full) ---

660 int load_idx = store_inst->lqIdx;
661
662 Fault store_fault = store_inst->initiateAcc();
663
664 if (store_inst->isTranslationDelayed() &&
665 store_fault == NoFault)
666 return store_fault;
667
668 if (store_inst->readPredicate() == false)
668 if (!store_inst->readPredicate())
669 store_inst->forwardOldRegs();
670
671 if (storeQueue[store_idx].size == 0) {
672 DPRINTF(LSQUnit,"Fault on Store PC %s, [sn:%lli], Size = 0\n",
673 store_inst->pcState(), store_inst->seqNum);
674
675 return store_fault;
669 store_inst->forwardOldRegs();
670
671 if (storeQueue[store_idx].size == 0) {
672 DPRINTF(LSQUnit,"Fault on Store PC %s, [sn:%lli], Size = 0\n",
673 store_inst->pcState(), store_inst->seqNum);
674
675 return store_fault;
676 } else if (store_inst->readPredicate() == false) {
676 } else if (!store_inst->readPredicate()) {
677 DPRINTF(LSQUnit, "Store [sn:%lli] not executed from predication\n",
678 store_inst->seqNum);
679 return store_fault;
680 }
681
682 assert(store_fault == NoFault);
683
684 if (store_inst->isStoreConditional()) {

--- 647 unchanged lines hidden --- 		677 DPRINTF(LSQUnit, "Store [sn:%lli] not executed from predication\n",
678 store_inst->seqNum);
679 return store_fault;
680 }
681
682 assert(store_fault == NoFault);
683
684 if (store_inst->isStoreConditional()) {

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