1
2/*
3 * Copyright (c) 2010-2012 ARM Limited
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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153 lsq = lsq_ptr;
154
155 lsqID = id;
156
157 // Add 1 for the sentinel entry (they are circular queues).
158 LQEntries = maxLQEntries + 1;
159 SQEntries = maxSQEntries + 1;
160
161 //Due to uint8_t index in LSQSenderState
162 assert(LQEntries <= 256);
163 assert(SQEntries <= 256);
164
165 loadQueue.resize(LQEntries);
166 storeQueue.resize(SQEntries);
167
168 depCheckShift = params->LSQDepCheckShift;
169 checkLoads = params->LSQCheckLoads;
170 cachePorts = params->cachePorts;
171 needsTSO = params->needsTSO;
172

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305 DynInstPtr dummy;
306 loadQueue.push_back(dummy);
307 LQEntries++;
308 }
309 } else {
310 LQEntries = size_plus_sentinel;
311 }
312
313 assert(LQEntries <= 256);
314}
315
316template<class Impl>
317void
318LSQUnit<Impl>::resizeSQ(unsigned size)
319{
320 unsigned size_plus_sentinel = size + 1;
321 if (size_plus_sentinel > SQEntries) {
322 while (size_plus_sentinel > storeQueue.size()) {
323 SQEntry dummy;
324 storeQueue.push_back(dummy);
325 SQEntries++;
326 }
327 } else {
328 SQEntries = size_plus_sentinel;
329 }
330
331 assert(SQEntries <= 256);
332}
333
334template <class Impl>
335void
336LSQUnit<Impl>::insert(DynInstPtr &inst)
337{
338 assert(inst->isMemRef());
339

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