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> #include "cpu/o3/lsq.hh"
99,138d99
< Tick
< LSQUnit<Impl>::DcachePort::recvAtomic(PacketPtr pkt)
< {
< panic("O3CPU model does not work with atomic mode!");
< return curTick;
< }
<
< template <class Impl>
< void
< LSQUnit<Impl>::DcachePort::recvFunctional(PacketPtr pkt)
< {
< panic("O3CPU doesn't expect recvFunctional callback!");
< }
<
< template <class Impl>
< void
< LSQUnit<Impl>::DcachePort::recvStatusChange(Status status)
< {
< if (status == RangeChange)
< return;
<
< panic("O3CPU doesn't expect recvStatusChange callback!");
< }
<
< template <class Impl>
< bool
< LSQUnit<Impl>::DcachePort::recvTiming(PacketPtr pkt)
< {
< lsq->completeDataAccess(pkt);
< return true;
< }
<
< template <class Impl>
< void
< LSQUnit<Impl>::DcachePort::recvRetry()
< {
< lsq->recvRetry();
< }
<
< template <class Impl>
148c109
< LSQUnit<Impl>::init(Params *params, unsigned maxLQEntries,
---
> LSQUnit<Impl>::init(Params *params, LSQ *lsq_ptr, unsigned maxLQEntries,
154a116,117
> lsq = lsq_ptr;
>
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< mem = params->mem;
<
183d143
< dcachePort = new DcachePort(cpu, this);
591c551
< if (isStoreBlocked) {
---
> if (isStoreBlocked || lsq->cacheBlocked()) {
913a874
> lsq->setRetryTid(lsqID);