1
2/*
3 * Copyright (c) 2010-2014, 2017-2018 ARM Limited
4 * Copyright (c) 2013 Advanced Micro Devices, Inc.
5 * All rights reserved
6 *
7 * The license below extends only to copyright in the software and shall
8 * not be construed as granting a license to any other intellectual

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537
538 DPRINTF(LSQUnit, "Executing load PC %s, [sn:%lli]\n",
539 inst->pcState(), inst->seqNum);
540
541 assert(!inst->isSquashed());
542
543 load_fault = inst->initiateAcc();
544
545 if (inst->isTranslationDelayed() && load_fault == NoFault)
546 return load_fault;
547
548 // If the instruction faulted or predicated false, then we need to send it
549 // along to commit without the instruction completing.
550 if (load_fault != NoFault || !inst->readPredicate()) {
551 // Send this instruction to commit, also make sure iew stage
552 // realizes there is activity. Mark it as executed unless it

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