lsq_unit.hh (8975:7f36d4436074) lsq_unit.hh (9044:904ddeecc653)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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36#include <cstring>
37#include <map>
38#include <queue>
39
40#include "arch/generic/debugfaults.hh"
41#include "arch/isa_traits.hh"
42#include "arch/locked_mem.hh"
43#include "arch/mmapped_ipr.hh"
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 27 unchanged lines hidden (view full) ---

36#include <cstring>
37#include <map>
38#include <queue>
39
40#include "arch/generic/debugfaults.hh"
41#include "arch/isa_traits.hh"
42#include "arch/locked_mem.hh"
43#include "arch/mmapped_ipr.hh"
44#include "base/fast_alloc.hh"
45#include "base/hashmap.hh"
46#include "config/the_isa.hh"
47#include "cpu/inst_seq.hh"
48#include "cpu/timebuf.hh"
49#include "debug/LSQUnit.hh"
50#include "mem/packet.hh"
51#include "mem/port.hh"
52#include "sim/fault_fwd.hh"

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266
267 /** Pointer to the LSQ. */
268 LSQ *lsq;
269
270 /** Pointer to the dcache port. Used only for sending. */
271 MasterPort *dcachePort;
272
273 /** Derived class to hold any sender state the LSQ needs. */
44#include "base/hashmap.hh"
45#include "config/the_isa.hh"
46#include "cpu/inst_seq.hh"
47#include "cpu/timebuf.hh"
48#include "debug/LSQUnit.hh"
49#include "mem/packet.hh"
50#include "mem/port.hh"
51#include "sim/fault_fwd.hh"

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265
266 /** Pointer to the LSQ. */
267 LSQ *lsq;
268
269 /** Pointer to the dcache port. Used only for sending. */
270 MasterPort *dcachePort;
271
272 /** Derived class to hold any sender state the LSQ needs. */
274 class LSQSenderState : public Packet::SenderState, public FastAlloc
273 class LSQSenderState : public Packet::SenderState
275 {
276 public:
277 /** Default constructor. */
278 LSQSenderState()
279 : noWB(false), isSplit(false), pktToSend(false), outstanding(1),
280 mainPkt(NULL), pendingPacket(NULL)
281 { }
282

--- 634 unchanged lines hidden --- 		274 {
275 public:
276 /** Default constructor. */
277 LSQSenderState()
278 : noWB(false), isSplit(false), pktToSend(false), outstanding(1),
279 mainPkt(NULL), pendingPacket(NULL)
280 { }
281

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