lsq_unit.hh (5336:c7e21f4e5a2e) lsq_unit.hh (5386:5614618f4027)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 26 unchanged lines hidden (view full) ---

35#include <algorithm>
36#include <cstring>
37#include <map>
38#include <queue>
39
40#include "arch/faults.hh"
41#include "arch/locked_mem.hh"
42#include "config/full_system.hh"
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 26 unchanged lines hidden (view full) ---

35#include <algorithm>
36#include <cstring>
37#include <map>
38#include <queue>
39
40#include "arch/faults.hh"
41#include "arch/locked_mem.hh"
42#include "config/full_system.hh"
43#include "base/fast_alloc.hh"
43#include "base/hashmap.hh"
44#include "cpu/inst_seq.hh"
45#include "mem/packet.hh"
46#include "mem/port.hh"
47
48/**
49 * Class that implements the actual LQ and SQ for each specific
50 * thread. Both are circular queues; load entries are freed upon

--- 189 unchanged lines hidden (view full) ---

240
241 /** Pointer to the LSQ. */
242 LSQ *lsq;
243
244 /** Pointer to the dcache port. Used only for sending. */
245 Port *dcachePort;
246
247 /** Derived class to hold any sender state the LSQ needs. */
44#include "base/hashmap.hh"
45#include "cpu/inst_seq.hh"
46#include "mem/packet.hh"
47#include "mem/port.hh"
48
49/**
50 * Class that implements the actual LQ and SQ for each specific
51 * thread. Both are circular queues; load entries are freed upon

--- 189 unchanged lines hidden (view full) ---

241
242 /** Pointer to the LSQ. */
243 LSQ *lsq;
244
245 /** Pointer to the dcache port. Used only for sending. */
246 Port *dcachePort;
247
248 /** Derived class to hold any sender state the LSQ needs. */
248 class LSQSenderState : public Packet::SenderState
249 class LSQSenderState : public Packet::SenderState, public FastAlloc
249 {
250 public:
251 /** Default constructor. */
252 LSQSenderState()
253 : noWB(false)
254 { }
255
256 /** Instruction who initiated the access to memory. */

--- 467 unchanged lines hidden --- 		250 {
251 public:
252 /** Default constructor. */
253 LSQSenderState()
254 : noWB(false)
255 { }
256
257 /** Instruction who initiated the access to memory. */

--- 467 unchanged lines hidden ---