lsq_unit.hh (2731:822b96578fba) lsq_unit.hh (2733:e0eac8fc5774)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 47 unchanged lines hidden (view full) ---

56 * replayed.
57 */
58template <class Impl>
59class LSQUnit {
60 protected:
61 typedef TheISA::IntReg IntReg;
62 public:
63 typedef typename Impl::Params Params;
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

--- 47 unchanged lines hidden (view full) ---

56 * replayed.
57 */
58template <class Impl>
59class LSQUnit {
60 protected:
61 typedef TheISA::IntReg IntReg;
62 public:
63 typedef typename Impl::Params Params;
64 typedef typename Impl::FullCPU FullCPU;
64 typedef typename Impl::O3CPU O3CPU;
65 typedef typename Impl::DynInstPtr DynInstPtr;
66 typedef typename Impl::CPUPol::IEW IEW;
67 typedef typename Impl::CPUPol::IssueStruct IssueStruct;
68
69 public:
70 /** Constructs an LSQ unit. init() must be called prior to use. */
71 LSQUnit();
72
73 /** Initializes the LSQ unit with the specified number of entries. */
74 void init(Params *params, unsigned maxLQEntries,
75 unsigned maxSQEntries, unsigned id);
76
77 /** Returns the name of the LSQ unit. */
78 std::string name() const;
79
80 /** Registers statistics. */
81 void regStats();
82
83 /** Sets the CPU pointer. */
65 typedef typename Impl::DynInstPtr DynInstPtr;
66 typedef typename Impl::CPUPol::IEW IEW;
67 typedef typename Impl::CPUPol::IssueStruct IssueStruct;
68
69 public:
70 /** Constructs an LSQ unit. init() must be called prior to use. */
71 LSQUnit();
72
73 /** Initializes the LSQ unit with the specified number of entries. */
74 void init(Params *params, unsigned maxLQEntries,
75 unsigned maxSQEntries, unsigned id);
76
77 /** Returns the name of the LSQ unit. */
78 std::string name() const;
79
80 /** Registers statistics. */
81 void regStats();
82
83 /** Sets the CPU pointer. */
84 void setCPU(FullCPU *cpu_ptr);
84 void setCPU(O3CPU *cpu_ptr);
85
86 /** Sets the IEW stage pointer. */
87 void setIEW(IEW *iew_ptr)
88 { iewStage = iew_ptr; }
89
90 /** Switches out LSQ unit. */
91 void switchOut();
92

--- 134 unchanged lines hidden (view full) ---

227 inline void decrLdIdx(int &load_idx);
228
229 public:
230 /** Debugging function to dump instructions in the LSQ. */
231 void dumpInsts();
232
233 private:
234 /** Pointer to the CPU. */
85
86 /** Sets the IEW stage pointer. */
87 void setIEW(IEW *iew_ptr)
88 { iewStage = iew_ptr; }
89
90 /** Switches out LSQ unit. */
91 void switchOut();
92

--- 134 unchanged lines hidden (view full) ---

227 inline void decrLdIdx(int &load_idx);
228
229 public:
230 /** Debugging function to dump instructions in the LSQ. */
231 void dumpInsts();
232
233 private:
234 /** Pointer to the CPU. */
235 FullCPU *cpu;
235 O3CPU *cpu;
236
237 /** Pointer to the IEW stage. */
238 IEW *iewStage;
239
240 /** Pointer to memory object. */
241 MemObject *mem;
242
243 /** DcachePort class for this LSQ Unit. Handles doing the
244 * communication with the cache/memory.
245 * @todo: Needs to be moved to the LSQ level and have some sort
246 * of arbitration.
247 */
248 class DcachePort : public Port
249 {
250 protected:
251 /** Pointer to CPU. */
236
237 /** Pointer to the IEW stage. */
238 IEW *iewStage;
239
240 /** Pointer to memory object. */
241 MemObject *mem;
242
243 /** DcachePort class for this LSQ Unit. Handles doing the
244 * communication with the cache/memory.
245 * @todo: Needs to be moved to the LSQ level and have some sort
246 * of arbitration.
247 */
248 class DcachePort : public Port
249 {
250 protected:
251 /** Pointer to CPU. */
252 FullCPU *cpu;
252 O3CPU *cpu;
253 /** Pointer to LSQ. */
254 LSQUnit *lsq;
255
256 public:
257 /** Default constructor. */
253 /** Pointer to LSQ. */
254 LSQUnit *lsq;
255
256 public:
257 /** Default constructor. */
258 DcachePort(FullCPU *_cpu, LSQUnit *_lsq)
258 DcachePort(O3CPU *_cpu, LSQUnit *_lsq)
259 : Port(_lsq->name() + "-dport"), cpu(_cpu), lsq(_lsq)
260 { }
261
262 protected:
263 /** Atomic version of receive. Panics. */
264 virtual Tick recvAtomic(PacketPtr pkt);
265
266 /** Functional version of receive. Panics. */

--- 459 unchanged lines hidden --- 		259 : Port(_lsq->name() + "-dport"), cpu(_cpu), lsq(_lsq)
260 { }
261
262 protected:
263 /** Atomic version of receive. Panics. */
264 virtual Tick recvAtomic(PacketPtr pkt);
265
266 /** Functional version of receive. Panics. */

--- 459 unchanged lines hidden ---