513c513,514
< Fault read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
---
> Fault read(const RequestPtr &req,
> RequestPtr &sreqLow, RequestPtr &sreqHigh,
517c518,519
< Fault write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
---
> Fault write(const RequestPtr &req,
> const RequestPtr &sreqLow, const RequestPtr &sreqHigh,
552c554,555
< LSQUnit<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
---
> LSQUnit<Impl>::read(const RequestPtr &req,
> RequestPtr &sreqLow, RequestPtr &sreqHigh,
572,579d574
< // Must delete request now that it wasn't handed off to
< // memory. This is quite ugly. @todo: Figure out the proper
< // place to really handle request deletes.
< delete req;
< if (TheISA::HasUnalignedMemAcc && sreqLow) {
< delete sreqLow;
< delete sreqHigh;
< }
629,630d623
< delete sreqLow;
< delete sreqHigh;
707,712d699
< // Don't need to do anything special for split loads.
< if (TheISA::HasUnalignedMemAcc && sreqLow) {
< delete sreqLow;
< delete sreqHigh;
< }
<
758,766d744
< // Must delete request now that it wasn't handed off to
< // memory. This is quite ugly. @todo: Figure out the
< // proper place to really handle request deletes.
< delete req;
< if (TheISA::HasUnalignedMemAcc && sreqLow) {
< delete sreqLow;
< delete sreqHigh;
< }
<
846d823
< delete req;
854d830
< delete req;
858,861c834,835
< delete sreqLow;
< delete sreqHigh;
< sreqLow = NULL;
< sreqHigh = NULL;
---
> sreqLow.reset();
> sreqHigh.reset();
866,867d839
< delete req;
< delete sreqHigh;
869c841
< sreqHigh = NULL;
---
> sreqHigh.reset();
886c858,859
< LSQUnit<Impl>::write(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
---
> LSQUnit<Impl>::write(const RequestPtr &req,
> const RequestPtr &sreqLow, const RequestPtr &sreqHigh,