lsq_impl.hh (13954:2f400a5f2627) lsq_impl.hh (14080:4472576445e7)
1/*
2 * Copyright (c) 2011-2012, 2014, 2017-2018 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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719 }
720 assert(req);
721 if (!byteEnable.empty()) {
722 req->_byteEnable = byteEnable;
723 }
724 inst->setRequest();
725 req->taskId(cpu->taskId());
726
1/*
2 * Copyright (c) 2011-2012, 2014, 2017-2018 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

--- 710 unchanged lines hidden (view full) ---

719 }
720 assert(req);
721 if (!byteEnable.empty()) {
722 req->_byteEnable = byteEnable;
723 }
724 inst->setRequest();
725 req->taskId(cpu->taskId());
726
727 // There might be fault from a previous execution attempt if this is
728 // a strictly ordered load
729 inst->getFault() = NoFault;
730
727 req->initiateTranslation();
728 }
729
730 /* This is the place were instructions get the effAddr. */
731 if (req->isTranslationComplete()) {
732 if (inst->getFault() == NoFault) {
733 inst->effAddr = req->getVaddr();
734 inst->effSize = size;

--- 418 unchanged lines hidden --- 		731 req->initiateTranslation();
732 }
733
734 /* This is the place were instructions get the effAddr. */
735 if (req->isTranslationComplete()) {
736 if (inst->getFault() == NoFault) {
737 inst->effAddr = req->getVaddr();
738 inst->effSize = size;

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