lsq_impl.hh (10239:592f0bb6bd6f) lsq_impl.hh (10333:6be8945d226b)
1/*
1/*
2 * Copyright (c) 2011-2012 ARM Limited
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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57
58using namespace std;
59
60template <class Impl>
61LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
62 : cpu(cpu_ptr), iewStage(iew_ptr),
63 LQEntries(params->LQEntries),
64 SQEntries(params->SQEntries),
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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57
58using namespace std;
59
60template <class Impl>
61LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
62 : cpu(cpu_ptr), iewStage(iew_ptr),
63 LQEntries(params->LQEntries),
64 SQEntries(params->SQEntries),
65 numThreads(params->numThreads),
66 retryTid(-1)
65 numThreads(params->numThreads)
67{
68 assert(numThreads > 0 && numThreads <= Impl::MaxThreads);
69
70 //**********************************************/
71 //************ Handle SMT Parameters ***********/
72 //**********************************************/
73 std::string policy = params->smtLSQPolicy;
74

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170 drained = false;
171 }
172
173 if (!sqEmpty()) {
174 DPRINTF(Drain, "Not drained, SQ not empty.\n");
175 drained = false;
176 }
177
66{
67 assert(numThreads > 0 && numThreads <= Impl::MaxThreads);
68
69 //**********************************************/
70 //************ Handle SMT Parameters ***********/
71 //**********************************************/
72 std::string policy = params->smtLSQPolicy;
73

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169 drained = false;
170 }
171
172 if (!sqEmpty()) {
173 DPRINTF(Drain, "Not drained, SQ not empty.\n");
174 drained = false;
175 }
176
178 if (retryTid != InvalidThreadID) {
179 DPRINTF(Drain, "Not drained, the LSQ has blocked the caches.\n");
180 drained = false;
181 }
182
183 return drained;
184}
185
186template <class Impl>
187void
188LSQ<Impl>::takeOverFrom()
189{
190 for (ThreadID tid = 0; tid < numThreads; tid++) {

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333
334 return false;
335}
336
337template <class Impl>
338void
339LSQ<Impl>::recvRetry()
340{
177 return drained;
178}
179
180template <class Impl>
181void
182LSQ<Impl>::takeOverFrom()
183{
184 for (ThreadID tid = 0; tid < numThreads; tid++) {

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327
328 return false;
329}
330
331template <class Impl>
332void
333LSQ<Impl>::recvRetry()
334{
341 if (retryTid == InvalidThreadID)
342 {
343 //Squashed, so drop it
344 return;
335 iewStage->cacheUnblocked();
336
337 for (ThreadID tid : *activeThreads) {
338 thread[tid].recvRetry();
345 }
339 }
346 int curr_retry_tid = retryTid;
347 // Speculatively clear the retry Tid. This will get set again if
348 // the LSQUnit was unable to complete its access.
349 retryTid = -1;
350 thread[curr_retry_tid].recvRetry();
351}
352
353template <class Impl>
354bool
355LSQ<Impl>::recvTimingResp(PacketPtr pkt)
356{
357 if (pkt->isError())
358 DPRINTF(LSQ, "Got error packet back for address: %#X\n",

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340}
341
342template <class Impl>
343bool
344LSQ<Impl>::recvTimingResp(PacketPtr pkt)
345{
346 if (pkt->isError())
347 DPRINTF(LSQ, "Got error packet back for address: %#X\n",

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