1/* |
2 * Copyright (c) 2011-2012 ARM Limited |
3 * All rights reserved 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software 9 * licensed hereunder. You may use the software subject to the license 10 * terms below provided that you ensure that this notice is replicated --- 305 unchanged lines hidden (view full) --- 316 retryTid = -1; 317 thread[curr_retry_tid].recvRetry(); 318} 319 320template <class Impl> 321bool 322LSQ<Impl>::recvTiming(PacketPtr pkt) 323{ |
324 assert(pkt->isResponse()); |
325 if (pkt->isError()) 326 DPRINTF(LSQ, "Got error packet back for address: %#X\n", 327 pkt->getAddr()); |
328 thread[pkt->req->threadId()].completeDataAccess(pkt); 329 return true; 330} |
331 |
332template <class Impl> 333bool 334LSQ<Impl>::recvTimingSnoop(PacketPtr pkt) 335{ 336 assert(pkt->isRequest()); 337 DPRINTF(LSQ, "received pkt for addr:%#x %s\n", pkt->getAddr(), 338 pkt->cmdString()); 339 340 // must be a snoop 341 if (pkt->isInvalidate()) { 342 DPRINTF(LSQ, "received invalidation for addr:%#x\n", 343 pkt->getAddr()); 344 for (ThreadID tid = 0; tid < numThreads; tid++) { 345 thread[tid].checkSnoop(pkt); |
346 } |
347 } |
348 349 // to provide stronger consistency model |
350 return true; 351} 352 353template<class Impl> 354int 355LSQ<Impl>::getCount() 356{ 357 unsigned total = 0; --- 256 unchanged lines hidden --- |