1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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56#include "debug/Writeback.hh"
57#include "params/DerivO3CPU.hh"
58
59using namespace std;
60
61template <class Impl>
62LSQ<Impl>::LSQ(O3CPU *cpu_ptr, IEW *iew_ptr, DerivO3CPUParams *params)
63 : cpu(cpu_ptr), iewStage(iew_ptr),
64 lsqPolicy(readLSQPolicy(params->smtLSQPolicy)),
65 LQEntries(params->LQEntries),
66 SQEntries(params->SQEntries),
67 maxLQEntries(maxLSQAllocation(lsqPolicy, LQEntries, params->numThreads,
68 params->smtLSQThreshold)),
69 maxSQEntries(maxLSQAllocation(lsqPolicy, SQEntries, params->numThreads,
70 params->smtLSQThreshold)),
71 numThreads(params->numThreads)
72{
73 assert(numThreads > 0 && numThreads <= Impl::MaxThreads);
74
75 //**********************************************/
76 //************ Handle SMT Parameters ***********/
77 //**********************************************/
78
79 //Figure out fetch policy
80 if (lsqPolicy == Dynamic) {
81 DPRINTF(LSQ, "LSQ sharing policy set to Dynamic\n");
82 } else if (lsqPolicy == Partitioned) {
83 DPRINTF(Fetch, "LSQ sharing policy set to Partitioned: "
84 "%i entries per LQ | %i entries per SQ\n",
85 maxLQEntries,maxSQEntries);
86 } else if (lsqPolicy == Threshold) {
87
88 assert(params->smtLSQThreshold > LQEntries);
89 assert(params->smtLSQThreshold > SQEntries);
90
91 DPRINTF(LSQ, "LSQ sharing policy set to Threshold: "
92 "%i entries per LQ | %i entries per SQ\n",
93 maxLQEntries,maxSQEntries);
94 } else {
95 panic("Invalid LSQ sharing policy. Options are: Dynamic, "
96 "Partitioned, Threshold");
97 }
98
99 thread.reserve(numThreads);
100 for (ThreadID tid = 0; tid < numThreads; tid++) {
101 thread.emplace_back(maxLQEntries, maxSQEntries);
102 thread[tid].init(cpu, iew_ptr, params, this, tid);
103 thread[tid].setDcachePort(&cpu_ptr->getDataPort());
104 }
105}
106
107
108template<class Impl>
109std::string
110LSQ<Impl>::name() const

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