1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating
9 * to a hardware implementation of the functionality of the software
10 * licensed hereunder. You may use the software subject to the license

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146 bool violation();
147 /**
148 * Returns whether or not there was a memory ordering violation for a
149 * specific thread.
150 */
151 bool violation(ThreadID tid)
152 { return thread[tid].violation(); }
153
154 /** Gets the instruction that caused the memory ordering violation. */
155 DynInstPtr getMemDepViolator(ThreadID tid)
156 { return thread[tid].getMemDepViolator(); }
157
158 /** Returns the head index of the load queue for a specific thread. */
159 int getLoadHead(ThreadID tid)
160 { return thread[tid].getLoadHead(); }
161

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260 /** Returns if the LSQ will write back to memory this cycle. */
261 bool willWB();
262 /** Returns if the LSQ of a specific thread will write back to memory this
263 * cycle.
264 */
265 bool willWB(ThreadID tid)
266 { return thread[tid].willWB(); }
267
268 /** Debugging function to print out all instructions. */
269 void dumpInsts() const;
270 /** Debugging function to print out instructions from a specific thread. */
271 void dumpInsts(ThreadID tid) const
272 { thread[tid].dumpInsts(); }
273
274 /** Executes a read operation, using the load specified at the load
275 * index.

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322 /** Max LQ Size - Used to Enforce Sharing Policies. */
323 unsigned maxLQEntries;
324
325 /** Max SQ Size - Used to Enforce Sharing Policies. */
326 unsigned maxSQEntries;
327
328 /** Number of Threads. */
329 ThreadID numThreads;
330};
331
332template <class Impl>
333Fault
334LSQ<Impl>::read(RequestPtr req, RequestPtr sreqLow, RequestPtr sreqHigh,
335 uint8_t *data, int load_idx)
336{
337 ThreadID tid = req->threadId();

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