inst_queue_impl.hh (13561:523608bb180c) | inst_queue_impl.hh (13590:d7e018859709) |
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1/* | 1/* |
2 * Copyright (c) 2011-2014 ARM Limited | 2 * Copyright (c) 2011-2014, 2017-2018 ARM Limited |
3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software 10 * licensed hereunder. You may use the software subject to the license --- 1124 unchanged lines hidden (view full) --- 1135{ 1136 deferredMemInsts.push_back(deferred_inst); 1137} 1138 1139template <class Impl> 1140void 1141InstructionQueue<Impl>::blockMemInst(const DynInstPtr &blocked_inst) 1142{ | 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software 10 * licensed hereunder. You may use the software subject to the license --- 1124 unchanged lines hidden (view full) --- 1135{ 1136 deferredMemInsts.push_back(deferred_inst); 1137} 1138 1139template <class Impl> 1140void 1141InstructionQueue<Impl>::blockMemInst(const DynInstPtr &blocked_inst) 1142{ |
1143 blocked_inst->translationStarted(false); 1144 blocked_inst->translationCompleted(false); 1145 | |
1146 blocked_inst->clearIssued(); 1147 blocked_inst->clearCanIssue(); 1148 blockedMemInsts.push_back(blocked_inst); 1149} 1150 1151template <class Impl> 1152void 1153InstructionQueue<Impl>::cacheUnblocked() --- 126 unchanged lines hidden (view full) --- 1280 // leaves more room for error. 1281 1282 if (!squashed_inst->isReadySrcRegIdx(src_reg_idx) && 1283 !src_reg->isFixedMapping()) { 1284 dependGraph.remove(src_reg->flatIndex(), 1285 squashed_inst); 1286 } 1287 | 1143 blocked_inst->clearIssued(); 1144 blocked_inst->clearCanIssue(); 1145 blockedMemInsts.push_back(blocked_inst); 1146} 1147 1148template <class Impl> 1149void 1150InstructionQueue<Impl>::cacheUnblocked() --- 126 unchanged lines hidden (view full) --- 1277 // leaves more room for error. 1278 1279 if (!squashed_inst->isReadySrcRegIdx(src_reg_idx) && 1280 !src_reg->isFixedMapping()) { 1281 dependGraph.remove(src_reg->flatIndex(), 1282 squashed_inst); 1283 } 1284 |
1288 | |
1289 ++iqSquashedOperandsExamined; 1290 } | 1285 ++iqSquashedOperandsExamined; 1286 } |
1287 |
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1291 } else if (!squashed_inst->isStoreConditional() || 1292 !squashed_inst->isCompleted()) { 1293 NonSpecMapIt ns_inst_it = 1294 nonSpecInsts.find(squashed_inst->seqNum); 1295 1296 // we remove non-speculative instructions from 1297 // nonSpecInsts already when they are ready, and so we 1298 // cannot always expect to find them --- 346 unchanged lines hidden --- | 1288 } else if (!squashed_inst->isStoreConditional() || 1289 !squashed_inst->isCompleted()) { 1290 NonSpecMapIt ns_inst_it = 1291 nonSpecInsts.find(squashed_inst->seqNum); 1292 1293 // we remove non-speculative instructions from 1294 // nonSpecInsts already when they are ready, and so we 1295 // cannot always expect to find them --- 346 unchanged lines hidden --- |