1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 762 unchanged lines hidden (view full) --- 771 issuing_inst->setIssued(); 772 ++total_issued; 773 774 if (!issuing_inst->isMemRef()) { 775 // Memory instructions can not be freed from the IQ until they 776 // complete. 777 ++freeEntries; 778 count[tid]--; |
779 issuing_inst->clearInIQ(); |
780 } else { 781 memDepUnit[tid].issue(issuing_inst); 782 } 783 784 listOrder.erase(order_it++); 785 statIssuedInstType[tid][op_class]++; 786 } else { 787 statFuBusy[op_class]++; --- 289 unchanged lines hidden (view full) --- 1077 1078 // Mark it as squashed within the IQ. 1079 squashed_inst->setSquashedInIQ(); 1080 1081 // @todo: Remove this hack where several statuses are set so the 1082 // inst will flow through the rest of the pipeline. 1083 squashed_inst->setIssued(); 1084 squashed_inst->setCanCommit(); |
1085 squashed_inst->clearInIQ(); |
1086 1087 //Update Thread IQ Count 1088 count[squashed_inst->threadNumber]--; 1089 1090 ++freeEntries; 1091 1092 DPRINTF(IQ, "[tid:%i]: Instruction [sn:%lli] PC %#x " 1093 "squashed.\n", --- 295 unchanged lines hidden --- |