1/* 2 * Copyright (c) 2011-2014 ARM Limited 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating --- 787 unchanged lines hidden (view full) --- 796 797 listOrder.erase(order_it++); 798 799 ++iqSquashedInstsIssued; 800 801 continue; 802 } 803 |
804 int idx = FUPool::NoCapableFU; |
805 Cycles op_latency = Cycles(1); 806 ThreadID tid = issuing_inst->threadNumber; 807 808 if (op_class != No_OpClass) { 809 idx = fuPool->getUnit(op_class); 810 issuing_inst->isFloating() ? fpAluAccesses++ : intAluAccesses++; |
811 if (idx > FUPool::NoFreeFU) { |
812 op_latency = fuPool->getOpLatency(op_class); 813 } 814 } 815 816 // If we have an instruction that doesn't require a FU, or a 817 // valid FU, then schedule for execution. |
818 if (idx != FUPool::NoFreeFU) { |
819 if (op_latency == Cycles(1)) { 820 i2e_info->size++; 821 instsToExecute.push_back(issuing_inst); 822 823 // Add the FU onto the list of FU's to be freed next 824 // cycle if we used one. 825 if (idx >= 0) 826 fuPool->freeUnitNextCycle(idx); --- 748 unchanged lines hidden --- |