inst_queue.hh (9184:a1a8f137b796) inst_queue.hh (9444:ab47fe7f03f0)
1/*
1/*
2 * Copyright (c) 2011 ARM Limited
2 * Copyright (c) 2011-2012 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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139 void setActiveThreads(std::list<ThreadID> *at_ptr);
140
141 /** Sets the timer buffer between issue and execute. */
142 void setIssueToExecuteQueue(TimeBuffer<IssueStruct> *i2eQueue);
143
144 /** Sets the global time buffer. */
145 void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
146
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software
9 * licensed hereunder. You may use the software subject to the license
10 * terms below provided that you ensure that this notice is replicated

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139 void setActiveThreads(std::list<ThreadID> *at_ptr);
140
141 /** Sets the timer buffer between issue and execute. */
142 void setIssueToExecuteQueue(TimeBuffer<IssueStruct> *i2eQueue);
143
144 /** Sets the global time buffer. */
145 void setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr);
146
147 /** Switches out the instruction queue. */
148 void switchOut();
147 /** Perform sanity checks after a drain. */
148 void drainSanityCheck() const;
149
150 /** Takes over execution from another CPU's thread. */
151 void takeOverFrom();
152
149
150 /** Takes over execution from another CPU's thread. */
151 void takeOverFrom();
152
153 /** Returns if the IQ is switched out. */
154 bool isSwitchedOut() { return switchedOut; }
155
156 /** Number of entries needed for given amount of threads. */
157 int entryAmount(ThreadID num_threads);
158
159 /** Resets max entries for all threads. */
160 void resetEntries();
161
162 /** Returns total number of free entries. */
163 unsigned numFreeEntries();

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423 /** The number of floating point registers in the CPU. */
424 unsigned numPhysFloatRegs;
425
426 /** Delay between commit stage and the IQ.
427 * @todo: Make there be a distinction between the delays within IEW.
428 */
429 Cycles commitToIEWDelay;
430
153 /** Number of entries needed for given amount of threads. */
154 int entryAmount(ThreadID num_threads);
155
156 /** Resets max entries for all threads. */
157 void resetEntries();
158
159 /** Returns total number of free entries. */
160 unsigned numFreeEntries();

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420 /** The number of floating point registers in the CPU. */
421 unsigned numPhysFloatRegs;
422
423 /** Delay between commit stage and the IQ.
424 * @todo: Make there be a distinction between the delays within IEW.
425 */
426 Cycles commitToIEWDelay;
427
431 /** Is the IQ switched out. */
432 bool switchedOut;
433
434 /** The sequence number of the squashed instruction. */
435 InstSeqNum squashedSeqNum[Impl::MaxThreads];
436
437 /** A cache of the recently woken registers. It is 1 if the register
438 * has been woken up recently, and 0 if the register has been added
439 * to the dependency graph and has not yet received its value. It
440 * is basically a secondary scoreboard, and should pretty much mirror
441 * the scoreboard that exists in the rename map.

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428 /** The sequence number of the squashed instruction. */
429 InstSeqNum squashedSeqNum[Impl::MaxThreads];
430
431 /** A cache of the recently woken registers. It is 1 if the register
432 * has been woken up recently, and 0 if the register has been added
433 * to the dependency graph and has not yet received its value. It
434 * is basically a secondary scoreboard, and should pretty much mirror
435 * the scoreboard that exists in the rename map.

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