inst_queue.hh (13429:a1e199fd8122) inst_queue.hh (13561:523608bb180c)
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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50#include <vector>
51
52#include "base/statistics.hh"
53#include "base/types.hh"
54#include "cpu/o3/dep_graph.hh"
55#include "cpu/inst_seq.hh"
56#include "cpu/op_class.hh"
57#include "cpu/timebuf.hh"
1/*
2 * Copyright (c) 2011-2012, 2014 ARM Limited
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * The license below extends only to copyright in the software and shall
7 * not be construed as granting a license to any other intellectual
8 * property including but not limited to intellectual property relating

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50#include <vector>
51
52#include "base/statistics.hh"
53#include "base/types.hh"
54#include "cpu/o3/dep_graph.hh"
55#include "cpu/inst_seq.hh"
56#include "cpu/op_class.hh"
57#include "cpu/timebuf.hh"
58#include "enums/SMTQueuePolicy.hh"
58#include "sim/eventq.hh"
59
60struct DerivO3CPUParams;
61class FUPool;
62class MemInterface;
63
64/**
65 * A standard instruction queue class. It holds ready instructions, in

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398 void moveToYoungerInst(ListOrderIt age_order_it);
399
400 DependencyGraph<DynInstPtr> dependGraph;
401
402 //////////////////////////////////////
403 // Various parameters
404 //////////////////////////////////////
405
59#include "sim/eventq.hh"
60
61struct DerivO3CPUParams;
62class FUPool;
63class MemInterface;
64
65/**
66 * A standard instruction queue class. It holds ready instructions, in

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399 void moveToYoungerInst(ListOrderIt age_order_it);
400
401 DependencyGraph<DynInstPtr> dependGraph;
402
403 //////////////////////////////////////
404 // Various parameters
405 //////////////////////////////////////
406
406 /** IQ Resource Sharing Policy */
407 enum IQPolicy {
408 Dynamic,
409 Partitioned,
410 Threshold
411 };
412
413 /** IQ sharing policy for SMT. */
407 /** IQ sharing policy for SMT. */
414 IQPolicy iqPolicy;
408 SMTQueuePolicy iqPolicy;
415
416 /** Number of Total Threads*/
417 ThreadID numThreads;
418
419 /** Pointer to list of active threads. */
420 std::list<ThreadID> *activeThreads;
421
422 /** Per Thread IQ count */

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410 /** Number of Total Threads*/
411 ThreadID numThreads;
412
413 /** Pointer to list of active threads. */
414 std::list<ThreadID> *activeThreads;
415
416 /** Per Thread IQ count */

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