1/* 2 * Copyright (c) 2011-2012 ARM Limited |
3 * Copyright (c) 2013 Advanced Micro Devices, Inc. |
4 * All rights reserved. 5 * 6 * The license below extends only to copyright in the software and shall 7 * not be construed as granting a license to any other intellectual 8 * property including but not limited to intellectual property relating 9 * to a hardware implementation of the functionality of the software 10 * licensed hereunder. You may use the software subject to the license 11 * terms below provided that you ensure that this notice is replicated --- 398 unchanged lines hidden (view full) --- 410 unsigned numEntries; 411 412 /** The total number of instructions that can be issued in one cycle. */ 413 unsigned totalWidth; 414 415 /** The number of physical registers in the CPU. */ 416 unsigned numPhysRegs; 417 |
418 /** Delay between commit stage and the IQ. 419 * @todo: Make there be a distinction between the delays within IEW. 420 */ 421 Cycles commitToIEWDelay; 422 423 /** The sequence number of the squashed instruction. */ 424 InstSeqNum squashedSeqNum[Impl::MaxThreads]; 425 --- 102 unchanged lines hidden --- |