iew_impl.hh (8850:ed91b534ed04) | iew_impl.hh (8887:20ea02da9c53) |
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1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 34 unchanged lines hidden (view full) --- 43// @todo: Fix the instantaneous communication among all the stages within 44// iew. There's a clear delay between issue and execute, yet backwards 45// communication happens simultaneously. 46 47#include <queue> 48 49#include "arch/utility.hh" 50#include "config/the_isa.hh" | 1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 34 unchanged lines hidden (view full) --- 43// @todo: Fix the instantaneous communication among all the stages within 44// iew. There's a clear delay between issue and execute, yet backwards 45// communication happens simultaneously. 46 47#include <queue> 48 49#include "arch/utility.hh" 50#include "config/the_isa.hh" |
51#include "config/use_checker.hh" | 51#include "cpu/checker/cpu.hh" |
52#include "cpu/o3/fu_pool.hh" 53#include "cpu/o3/iew.hh" 54#include "cpu/timebuf.hh" 55#include "debug/Activity.hh" 56#include "debug/Decode.hh" 57#include "debug/IEW.hh" 58#include "params/DerivO3CPU.hh" 59 | 52#include "cpu/o3/fu_pool.hh" 53#include "cpu/o3/iew.hh" 54#include "cpu/timebuf.hh" 55#include "debug/Activity.hh" 56#include "debug/Decode.hh" 57#include "debug/IEW.hh" 58#include "params/DerivO3CPU.hh" 59 |
60#if USE_CHECKER 61#include "cpu/checker/cpu.hh" 62#endif // USE_CHECKER 63 | |
64using namespace std; 65 66template<class Impl> 67DefaultIEW<Impl>::DefaultIEW(O3CPU *_cpu, DerivO3CPUParams *params) 68 : issueToExecQueue(params->backComSize, params->forwardComSize), 69 cpu(_cpu), 70 instQueue(_cpu, this, params), 71 ldstQueue(_cpu, this, params), --- 222 unchanged lines hidden (view full) --- 294 toRename->iewInfo[tid].freeIQEntries = 295 instQueue.numFreeEntries(tid); 296 297 toRename->iewInfo[tid].usedLSQ = true; 298 toRename->iewInfo[tid].freeLSQEntries = 299 ldstQueue.numFreeEntries(tid); 300 } 301 | 60using namespace std; 61 62template<class Impl> 63DefaultIEW<Impl>::DefaultIEW(O3CPU *_cpu, DerivO3CPUParams *params) 64 : issueToExecQueue(params->backComSize, params->forwardComSize), 65 cpu(_cpu), 66 instQueue(_cpu, this, params), 67 ldstQueue(_cpu, this, params), --- 222 unchanged lines hidden (view full) --- 290 toRename->iewInfo[tid].freeIQEntries = 291 instQueue.numFreeEntries(tid); 292 293 toRename->iewInfo[tid].usedLSQ = true; 294 toRename->iewInfo[tid].freeLSQEntries = 295 ldstQueue.numFreeEntries(tid); 296 } 297 |
302// Initialize the checker's dcache port here 303#if USE_CHECKER | 298 // Initialize the checker's dcache port here |
304 if (cpu->checker) { 305 cpu->checker->setDcachePort(&cpu->getDataPort()); | 299 if (cpu->checker) { 300 cpu->checker->setDcachePort(&cpu->getDataPort()); |
306 } 307#endif | 301 } |
308 309 cpu->activateStage(O3CPU::IEWIdx); 310} 311 312template<class Impl> 313void 314DefaultIEW<Impl>::setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr) 315{ --- 1371 unchanged lines hidden --- | 302 303 cpu->activateStage(O3CPU::IEWIdx); 304} 305 306template<class Impl> 307void 308DefaultIEW<Impl>::setTimeBuffer(TimeBuffer<TimeStruct> *tb_ptr) 309{ --- 1371 unchanged lines hidden --- |