1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 681 unchanged lines hidden (view full) --- 690} 691 692template<class Impl> 693int 694DefaultIEW<Impl>::skidCount() 695{ 696 int max=0; 697 |
698 std::list<unsigned>::iterator threads = activeThreads->begin(); 699 std::list<unsigned>::iterator end = activeThreads->end(); |
700 |
701 while (threads != end) { 702 unsigned tid = *threads++; 703 unsigned thread_count = skidBuffer[tid].size(); |
704 if (max < thread_count) 705 max = thread_count; 706 } 707 708 return max; 709} 710 711template<class Impl> 712bool 713DefaultIEW<Impl>::skidsEmpty() 714{ |
715 std::list<unsigned>::iterator threads = activeThreads->begin(); 716 std::list<unsigned>::iterator end = activeThreads->end(); |
717 |
718 while (threads != end) { 719 unsigned tid = *threads++; 720 721 if (!skidBuffer[tid].empty()) |
722 return false; 723 } 724 725 return true; 726} 727 728template <class Impl> 729void 730DefaultIEW<Impl>::updateStatus() 731{ 732 bool any_unblocking = false; 733 |
734 std::list<unsigned>::iterator threads = activeThreads->begin(); 735 std::list<unsigned>::iterator end = activeThreads->end(); |
736 |
737 while (threads != end) { |
738 unsigned tid = *threads++; 739 740 if (dispatchStatus[tid] == Unblocking) { 741 any_unblocking = true; 742 break; 743 } 744 } 745 --- 397 unchanged lines hidden (view full) --- 1143 add_to_iq = false; 1144 1145 ++iewDispNonSpecInsts; 1146 } else { 1147 add_to_iq = true; 1148 } 1149 1150 toRename->iewInfo[tid].dispatchedToLSQ++; |
1151 } else if (inst->isMemBarrier() || inst->isWriteBarrier()) { 1152 // Same as non-speculative stores. 1153 inst->setCanCommit(); 1154 instQueue.insertBarrier(inst); 1155 add_to_iq = false; |
1156 } else if (inst->isNonSpeculative()) { 1157 DPRINTF(IEW, "[tid:%i]: Issue: Nonspeculative instruction " 1158 "encountered, skipping.\n", tid); 1159 1160 // Same as non-speculative stores. 1161 inst->setCanCommit(); 1162 1163 // Specifically insert it as nonspeculative. --- 83 unchanged lines hidden (view full) --- 1247 1248template <class Impl> 1249void 1250DefaultIEW<Impl>::executeInsts() 1251{ 1252 wbNumInst = 0; 1253 wbCycle = 0; 1254 |
1255 std::list<unsigned>::iterator threads = activeThreads->begin(); 1256 std::list<unsigned>::iterator end = activeThreads->end(); |
1257 |
1258 while (threads != end) { |
1259 unsigned tid = *threads++; 1260 fetchRedirect[tid] = false; 1261 } 1262 1263 // Uncomment this if you want to see all available instructions. 1264// printAvailableInsts(); 1265 1266 // Execute/writeback any instructions that are available. --- 222 unchanged lines hidden (view full) --- 1489 wroteToTimeBuffer = false; 1490 updatedQueues = false; 1491 1492 sortInsts(); 1493 1494 // Free function units marked as being freed this cycle. 1495 fuPool->processFreeUnits(); 1496 |
1497 std::list<unsigned>::iterator threads = activeThreads->begin(); 1498 std::list<unsigned>::iterator end = activeThreads->end(); |
1499 1500 // Check stall and squash signals, dispatch any instructions. |
1501 while (threads != end) { 1502 unsigned tid = *threads++; |
1503 1504 DPRINTF(IEW,"Issue: Processing [tid:%i]\n",tid); 1505 1506 checkSignalsAndUpdate(tid); 1507 dispatch(tid); 1508 } 1509 1510 if (exeStatus != Squashing) { --- 23 unchanged lines hidden (view full) --- 1534 // Writeback any stores using any leftover bandwidth. 1535 ldstQueue.writebackStores(); 1536 1537 // Check the committed load/store signals to see if there's a load 1538 // or store to commit. Also check if it's being told to execute a 1539 // nonspeculative instruction. 1540 // This is pretty inefficient... 1541 |
1542 threads = activeThreads->begin(); 1543 while (threads != end) { |
1544 unsigned tid = (*threads++); 1545 1546 DPRINTF(IEW,"Processing [tid:%i]\n",tid); 1547 1548 // Update structures based on instructions committed. 1549 if (fromCommit->commitInfo[tid].doneSeqNum != 0 && 1550 !fromCommit->commitInfo[tid].squash && 1551 !fromCommit->commitInfo[tid].robSquashing) { --- 88 unchanged lines hidden --- |