1a2,13
> * Copyright (c) 2010 ARM Limited
> * All rights reserved.
> *
> * The license below extends only to copyright in the software and shall
> * not be construed as granting a license to any other intellectual
> * property including but not limited to intellectual property relating
> * to a hardware implementation of the functionality of the software
> * licensed hereunder. You may use the software subject to the license
> * terms below provided that you ensure that this notice is replicated
> * unmodified and in its entirety in all distributions of the software,
> * modified or unmodified, in source code or in binary form.
> *
1587a1600,1629
>
> template <class Impl>
> void
> DefaultIEW<Impl>::checkMisprediction(DynInstPtr &inst)
> {
> ThreadID tid = inst->threadNumber;
>
> if (!fetchRedirect[tid] ||
> toCommit->squashedSeqNum[tid] > inst->seqNum) {
>
> if (inst->mispredicted()) {
> fetchRedirect[tid] = true;
>
> DPRINTF(IEW, "Execute: Branch mispredict detected.\n");
> DPRINTF(IEW, "Predicted target was PC:%#x, NPC:%#x.\n",
> inst->readPredPC(), inst->readPredNPC());
> DPRINTF(IEW, "Execute: Redirecting fetch to PC: %#x,"
> " NPC: %#x.\n", inst->readNextPC(),
> inst->readNextNPC());
> // If incorrect, then signal the ROB that it must be squashed.
> squashDueToBranch(inst, tid);
>
> if (inst->readPredTaken()) {
> predictedTakenIncorrect++;
> } else {
> predictedNotTakenIncorrect++;
> }
> }
> }
> }