1156,1168d1155
< } else if (inst->isNonSpeculative()) {
< DPRINTF(IEW, "[tid:%i]: Issue: Nonspeculative instruction "
< "encountered, skipping.\n", tid);
<
< // Same as non-speculative stores.
< inst->setCanCommit();
<
< // Specifically insert it as nonspeculative.
< instQueue.insertNonSpec(inst);
<
< ++iewDispNonSpecInsts;
<
< add_to_iq = false;
1195a1183,1185
> if (inst->isNonSpeculative()) {
> DPRINTF(IEW, "[tid:%i]: Issue: Nonspeculative instruction "
> "encountered, skipping.\n", tid);
1196a1187,1197
> // Same as non-speculative stores.
> inst->setCanCommit();
>
> // Specifically insert it as nonspeculative.
> instQueue.insertNonSpec(inst);
>
> ++iewDispNonSpecInsts;
>
> add_to_iq = false;
> }
>
1381a1383
> assert(inst->isMemRef());
1394,1395c1396,1397
< if (fetchRedirect[tid] &&
< violator->seqNum >= toCommit->squashedSeqNum[tid])
---
> /* if (fetchRedirect[tid] &&
> violator->seqNum >= toCommit->squashedSeqNum[tid] + 1)
1397c1399
<
---
> */
1416a1419,1445
> } else {
> // Reset any state associated with redirects that will not
> // be used.
> if (ldstQueue.violation(tid)) {
> assert(inst->isMemRef());
>
> DynInstPtr violator = ldstQueue.getMemDepViolator(tid);
>
> DPRINTF(IEW, "LDSTQ detected a violation. Violator PC: "
> "%#x, inst PC: %#x. Addr is: %#x.\n",
> violator->readPC(), inst->readPC(), inst->physEffAddr);
> DPRINTF(IEW, "Violation will not be handled because "
> "already squashing\n");
>
> ++memOrderViolationEvents;
> }
> if (ldstQueue.loadBlocked(tid) &&
> !ldstQueue.isLoadBlockedHandled(tid)) {
> DPRINTF(IEW, "Load operation couldn't execute because the "
> "memory system is blocked. PC: %#x [sn:%lli]\n",
> inst->readPC(), inst->seqNum);
> DPRINTF(IEW, "Blocked load will not be handled because "
> "already squashing\n");
>
> ldstQueue.setLoadBlockedHandled(tid);
> }
>
1565a1595
> fromCommit->commitInfo[tid].uncachedLoad->setAtCommit();