484,485c484,488
< bool branch_taken = inst->readNextNPC() !=
< (inst->readNextPC() + sizeof(TheISA::MachInst));
---
> bool branch_taken =
> (inst->readNextNPC() != (inst->readPC() + 2 * sizeof(TheISA::MachInst)) &&
> inst->readNextNPC() != (inst->readPC() + 3 * sizeof(TheISA::MachInst)));
> DPRINTF(Sparc, "Branch taken = %s [sn:%i]\n",
> branch_taken ? "true": "false", inst->seqNum);
489,491c492,500
< toCommit->condDelaySlotBranch[tid] = inst->isCondDelaySlot();
<
< if (inst->isCondDelaySlot() && branch_taken) {
---
> bool squashDelaySlot =
> (inst->readNextPC() != inst->readPC() + sizeof(TheISA::MachInst));
> DPRINTF(Sparc, "Squash delay slot = %s [sn:%i]\n",
> squashDelaySlot ? "true": "false", inst->seqNum);
> toCommit->squashDelaySlot[tid] = squashDelaySlot;
> //If we're squashing the delay slot, we need to pick back up at NextPC.
> //Otherwise, NextPC isn't being squashed, so we should pick back up at
> //NextNPC.
> if (squashDelaySlot)
493c502
< } else {
---
> else
495d503
< }
517d524
< toCommit->branchMispredict[tid] = false;
534d540
< toCommit->branchMispredict[tid] = false;
1296,1297c1302
< DPRINTF(IEW, "Store has fault %s! [sn:%lli]\n",
< fault->name(), inst->seqNum);
---
> DPRINTF(IEW, "Store has fault! [sn:%lli]\n", inst->seqNum);
1334,1335c1339
< if (!fetchRedirect[tid] ||
< toCommit->squashedSeqNum[tid] > inst->seqNum) {
---
> if (!fetchRedirect[tid]) {
1356a1361,1362
> fetchRedirect[tid] = true;
>
1367,1374d1372
< // Ensure the violating instruction is older than
< // current squash
< if (fetchRedirect[tid] &&
< violator->seqNum >= toCommit->squashedSeqNum[tid])
< continue;
<
< fetchRedirect[tid] = true;
<