iew_impl.hh (8737:770ccf3af571) | iew_impl.hh (8850:ed91b534ed04) |
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1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 288 unchanged lines hidden (view full) --- 297 toRename->iewInfo[tid].usedLSQ = true; 298 toRename->iewInfo[tid].freeLSQEntries = 299 ldstQueue.numFreeEntries(tid); 300 } 301 302// Initialize the checker's dcache port here 303#if USE_CHECKER 304 if (cpu->checker) { | 1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 288 unchanged lines hidden (view full) --- 297 toRename->iewInfo[tid].usedLSQ = true; 298 toRename->iewInfo[tid].freeLSQEntries = 299 ldstQueue.numFreeEntries(tid); 300 } 301 302// Initialize the checker's dcache port here 303#if USE_CHECKER 304 if (cpu->checker) { |
305 cpu->checker->setDcachePort(cpu->getDcachePort()); | 305 cpu->checker->setDcachePort(&cpu->getDataPort()); |
306 } 307#endif 308 309 cpu->activateStage(O3CPU::IEWIdx); 310} 311 312template<class Impl> 313void --- 1373 unchanged lines hidden --- | 306 } 307#endif 308 309 cpu->activateStage(O3CPU::IEWIdx); 310} 311 312template<class Impl> 313void --- 1373 unchanged lines hidden --- |