iew.hh (8230:845c8eb5ac49) iew.hh (8232:b28d06a175be)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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47#include <set>
48
49#include "base/statistics.hh"
50#include "config/full_system.hh"
51#include "cpu/o3/comm.hh"
52#include "cpu/o3/lsq.hh"
53#include "cpu/o3/scoreboard.hh"
54#include "cpu/timebuf.hh"
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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47#include <set>
48
49#include "base/statistics.hh"
50#include "config/full_system.hh"
51#include "cpu/o3/comm.hh"
52#include "cpu/o3/lsq.hh"
53#include "cpu/o3/scoreboard.hh"
54#include "cpu/timebuf.hh"
55#include "debug/IEW.hh"
55
56class DerivO3CPUParams;
57class FUPool;
58
59/**
60 * DefaultIEW handles both single threaded and SMT IEW
61 * (issue/execute/writeback). It handles the dispatching of
62 * instructions to the LSQ/IQ as part of the issue stage, and has the

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57class DerivO3CPUParams;
58class FUPool;
59
60/**
61 * DefaultIEW handles both single threaded and SMT IEW
62 * (issue/execute/writeback). It handles the dispatching of
63 * instructions to the LSQ/IQ as part of the issue stage, and has the

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