iew.hh (2871:7ed5c9ef3eb6) iew.hh (2926:48f2f450cbf6)
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_IEW_HH__
32#define __CPU_O3_IEW_HH__
33
1/*
2 * Copyright (c) 2004-2006 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;

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26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27 *
28 * Authors: Kevin Lim
29 */
30
31#ifndef __CPU_O3_IEW_HH__
32#define __CPU_O3_IEW_HH__
33
34#include "config/full_system.hh"
35
34#include <queue>
35
36#include "base/statistics.hh"
37#include "base/timebuf.hh"
36#include <queue>
37
38#include "base/statistics.hh"
39#include "base/timebuf.hh"
38#include "config/full_system.hh"
39#include "cpu/o3/comm.hh"
40#include "cpu/o3/scoreboard.hh"
41#include "cpu/o3/lsq.hh"
42
43class FUPool;
44
45/**
46 * DefaultIEW handles both single threaded and SMT IEW

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210 /** Returns if the LSQ has any stores to writeback. */
211 bool hasStoresToWB() { return ldstQueue.hasStoresToWB(); }
212
213 void incrWb(InstSeqNum &sn)
214 {
215 if (++wbOutstanding == wbMax)
216 ableToIssue = false;
217 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
40#include "cpu/o3/comm.hh"
41#include "cpu/o3/scoreboard.hh"
42#include "cpu/o3/lsq.hh"
43
44class FUPool;
45
46/**
47 * DefaultIEW handles both single threaded and SMT IEW

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211 /** Returns if the LSQ has any stores to writeback. */
212 bool hasStoresToWB() { return ldstQueue.hasStoresToWB(); }
213
214 void incrWb(InstSeqNum &sn)
215 {
216 if (++wbOutstanding == wbMax)
217 ableToIssue = false;
218 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
218#if DEBUG
219#ifdef DEBUG
219 wbList.insert(sn);
220#endif
221 }
222
223 void decrWb(InstSeqNum &sn)
224 {
225 if (wbOutstanding-- == wbMax)
226 ableToIssue = true;
227 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
220 wbList.insert(sn);
221#endif
222 }
223
224 void decrWb(InstSeqNum &sn)
225 {
226 if (wbOutstanding-- == wbMax)
227 ableToIssue = true;
228 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding);
228#if DEBUG
229#ifdef DEBUG
229 assert(wbList.find(sn) != wbList.end());
230 wbList.erase(sn);
231#endif
232 }
233
230 assert(wbList.find(sn) != wbList.end());
231 wbList.erase(sn);
232#endif
233 }
234
234#if DEBUG
235#ifdef DEBUG
235 std::set<InstSeqNum> wbList;
236
237 void dumpWb()
238 {
239 std::set<InstSeqNum>::iterator wb_it = wbList.begin();
240 while (wb_it != wbList.end()) {
241 cprintf("[sn:%lli]\n",
242 (*wb_it));

--- 299 unchanged lines hidden --- 		236 std::set<InstSeqNum> wbList;
237
238 void dumpWb()
239 {
240 std::set<InstSeqNum>::iterator wb_it = wbList.begin();
241 while (wb_it != wbList.end()) {
242 cprintf("[sn:%lli]\n",
243 (*wb_it));

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