| 1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 202 unchanged lines hidden (view full) --- 211 /** Returns if the LSQ has any stores to writeback. */ 212 bool hasStoresToWB() { return ldstQueue.hasStoresToWB(); } 213 214 void incrWb(InstSeqNum &sn) 215 { 216 if (++wbOutstanding == wbMax) 217 ableToIssue = false; 218 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding); |
| 219 assert(wbOutstanding <= wbMax); |
| 220#ifdef DEBUG 221 wbList.insert(sn); 222#endif 223 } 224 225 void decrWb(InstSeqNum &sn) 226 { 227 if (wbOutstanding-- == wbMax) 228 ableToIssue = true; 229 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding); |
| 230 assert(wbOutstanding >= 0); |
| 231#ifdef DEBUG 232 assert(wbList.find(sn) != wbList.end()); 233 wbList.erase(sn); 234#endif 235 } 236 237#ifdef DEBUG 238 std::set<InstSeqNum> wbList; --- 208 unchanged lines hidden (view full) --- 447 /** Cycle number within the queue of instructions being written back. 448 * Used in case there are too many instructions writing back at the current 449 * cycle and writesbacks need to be scheduled for the future. See comments 450 * in instToCommit(). 451 */ 452 unsigned wbCycle; 453 454 /** Number of instructions in flight that will writeback. */ |
| 455 |
| 456 /** Number of instructions in flight that will writeback. */ 457 int wbOutstanding; 458 |
| 459 /** Writeback width. */ 460 unsigned wbWidth; 461 462 /** Writeback width * writeback depth, where writeback depth is 463 * the number of cycles of writing back instructions that can be 464 * buffered. */ 465 unsigned wbMax; 466 --- 39 unchanged lines hidden (view full) --- 506 Stats::Scalar<> predictedNotTakenIncorrect; 507 /** Stat for total number of mispredicted branches detected at execute. */ 508 Stats::Formula branchMispredicts; 509 510 /** Stat for total number of executed instructions. */ 511 Stats::Scalar<> iewExecutedInsts; 512 /** Stat for total number of executed load instructions. */ 513 Stats::Vector<> iewExecLoadInsts; |
| 514 /** Stat for total number of executed store instructions. */ 515// Stats::Scalar<> iewExecStoreInsts; |
| 516 /** Stat for total number of squashed instructions skipped at execute. */ 517 Stats::Scalar<> iewExecSquashedInsts; 518 /** Number of executed software prefetches. */ 519 Stats::Vector<> iewExecutedSwp; 520 /** Number of executed nops. */ 521 Stats::Vector<> iewExecutedNop; 522 /** Number of executed meomory references. */ 523 Stats::Vector<> iewExecutedRefs; --- 28 unchanged lines hidden --- |