1/* 2 * Copyright (c) 2004-2006 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 17 unchanged lines hidden (view full) --- 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Authors: Kevin Lim 29 */ 30 31#ifndef __CPU_O3_IEW_HH__ 32#define __CPU_O3_IEW_HH__ 33 |
34#include "config/full_system.hh" 35 |
36#include <queue> 37 38#include "base/statistics.hh" 39#include "base/timebuf.hh" |
40#include "cpu/o3/comm.hh" 41#include "cpu/o3/scoreboard.hh" 42#include "cpu/o3/lsq.hh" 43 44class FUPool; 45 46/** 47 * DefaultIEW handles both single threaded and SMT IEW --- 163 unchanged lines hidden (view full) --- 211 /** Returns if the LSQ has any stores to writeback. */ 212 bool hasStoresToWB() { return ldstQueue.hasStoresToWB(); } 213 214 void incrWb(InstSeqNum &sn) 215 { 216 if (++wbOutstanding == wbMax) 217 ableToIssue = false; 218 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding); |
219#ifdef DEBUG |
220 wbList.insert(sn); 221#endif 222 } 223 224 void decrWb(InstSeqNum &sn) 225 { 226 if (wbOutstanding-- == wbMax) 227 ableToIssue = true; 228 DPRINTF(IEW, "wbOutstanding: %i\n", wbOutstanding); |
229#ifdef DEBUG |
230 assert(wbList.find(sn) != wbList.end()); 231 wbList.erase(sn); 232#endif 233 } 234 |
235#ifdef DEBUG |
236 std::set<InstSeqNum> wbList; 237 238 void dumpWb() 239 { 240 std::set<InstSeqNum>::iterator wb_it = wbList.begin(); 241 while (wb_it != wbList.end()) { 242 cprintf("[sn:%lli]\n", 243 (*wb_it)); --- 299 unchanged lines hidden --- |