free_list.hh (2654:9559cfa91b9d) | free_list.hh (2665:a124942bacb8) |
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1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 10 unchanged lines hidden (view full) --- 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; --- 10 unchanged lines hidden (view full) --- 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. |
27 * 28 * Authors: Kevin Lim |
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27 */ 28 | 29 */ 30 |
29#ifndef __CPU_O3_FREE_LIST_HH__ 30#define __CPU_O3_FREE_LIST_HH__ | 31#ifndef __CPU_O3_CPU_FREE_LIST_HH__ 32#define __CPU_O3_CPU_FREE_LIST_HH__ |
31 32#include <iostream> 33#include <queue> 34 35#include "arch/isa_traits.hh" 36#include "base/trace.hh" 37#include "base/traceflags.hh" 38#include "cpu/o3/comm.hh" 39 40/** 41 * FreeList class that simply holds the list of free integer and floating 42 * point registers. Can request for a free register of either type, and 43 * also send back free registers of either type. This is a very simple 44 * class, but it should be sufficient for most implementations. Like all 45 * other classes, it assumes that the indices for the floating point 46 * registers starts after the integer registers end. Hence the variable 47 * numPhysicalIntRegs is logically equivalent to the baseFP dependency. | 33 34#include <iostream> 35#include <queue> 36 37#include "arch/isa_traits.hh" 38#include "base/trace.hh" 39#include "base/traceflags.hh" 40#include "cpu/o3/comm.hh" 41 42/** 43 * FreeList class that simply holds the list of free integer and floating 44 * point registers. Can request for a free register of either type, and 45 * also send back free registers of either type. This is a very simple 46 * class, but it should be sufficient for most implementations. Like all 47 * other classes, it assumes that the indices for the floating point 48 * registers starts after the integer registers end. Hence the variable 49 * numPhysicalIntRegs is logically equivalent to the baseFP dependency. |
48 * Note that while this most likely should be called FreeList, the name 49 * "FreeList" is used in a typedef within the CPU Policy, and therefore no 50 * class can be named simply "FreeList". | 50 * Note that 51 * while this most likely should be called FreeList, the name "FreeList" 52 * is used in a typedef within the CPU Policy, and therefore no class 53 * can be named simply "FreeList". |
51 * @todo: Give a better name to the base FP dependency. 52 */ 53class SimpleFreeList 54{ 55 private: 56 /** The list of free integer registers. */ 57 std::queue<PhysRegIndex> freeIntRegs; 58 --- 10 unchanged lines hidden (view full) --- 69 int numLogicalFloatRegs; 70 71 /** Number of physical floating point registers. */ 72 int numPhysicalFloatRegs; 73 74 /** Total number of physical registers. */ 75 int numPhysicalRegs; 76 | 54 * @todo: Give a better name to the base FP dependency. 55 */ 56class SimpleFreeList 57{ 58 private: 59 /** The list of free integer registers. */ 60 std::queue<PhysRegIndex> freeIntRegs; 61 --- 10 unchanged lines hidden (view full) --- 72 int numLogicalFloatRegs; 73 74 /** Number of physical floating point registers. */ 75 int numPhysicalFloatRegs; 76 77 /** Total number of physical registers. */ 78 int numPhysicalRegs; 79 |
80 /** DEBUG stuff below. */ 81 std::vector<int> freeIntRegsScoreboard; 82 83 std::vector<bool> freeFloatRegsScoreboard; 84 |
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77 public: | 85 public: |
78 /** Constructs a free list. 79 * @param activeThreads Number of active threads. 80 * @param _numLogicalIntRegs Number of logical integer registers. 81 * @param _numPhysicalIntRegs Number of physical integer registers. 82 * @param _numLogicalFloatRegs Number of logical fp registers. 83 * @param _numPhysicalFloatRegs Number of physical fp registers. 84 */ 85 SimpleFreeList(unsigned activeThreads, 86 unsigned _numLogicalIntRegs, | 86 SimpleFreeList(unsigned _numLogicalIntRegs, |
87 unsigned _numPhysicalIntRegs, 88 unsigned _numLogicalFloatRegs, 89 unsigned _numPhysicalFloatRegs); 90 | 87 unsigned _numPhysicalIntRegs, 88 unsigned _numLogicalFloatRegs, 89 unsigned _numPhysicalFloatRegs); 90 |
91 /** Gives the name of the freelist. */ 92 std::string name() const; 93 94 /** Gets a free integer register. */ | |
95 inline PhysRegIndex getIntReg(); 96 | 91 inline PhysRegIndex getIntReg(); 92 |
97 /** Gets a free fp register. */ | |
98 inline PhysRegIndex getFloatReg(); 99 | 93 inline PhysRegIndex getFloatReg(); 94 |
100 /** Adds a register back to the free list. */ | |
101 inline void addReg(PhysRegIndex freed_reg); 102 | 95 inline void addReg(PhysRegIndex freed_reg); 96 |
103 /** Adds an integer register back to the free list. */ | |
104 inline void addIntReg(PhysRegIndex freed_reg); 105 | 97 inline void addIntReg(PhysRegIndex freed_reg); 98 |
106 /** Adds a fp register back to the free list. */ | |
107 inline void addFloatReg(PhysRegIndex freed_reg); 108 | 99 inline void addFloatReg(PhysRegIndex freed_reg); 100 |
109 /** Checks if there are any free integer registers. */ | |
110 bool hasFreeIntRegs() 111 { return !freeIntRegs.empty(); } 112 | 101 bool hasFreeIntRegs() 102 { return !freeIntRegs.empty(); } 103 |
113 /** Checks if there are any free fp registers. */ | |
114 bool hasFreeFloatRegs() 115 { return !freeFloatRegs.empty(); } 116 | 104 bool hasFreeFloatRegs() 105 { return !freeFloatRegs.empty(); } 106 |
117 /** Returns the number of free integer registers. */ | |
118 int numFreeIntRegs() 119 { return freeIntRegs.size(); } 120 | 107 int numFreeIntRegs() 108 { return freeIntRegs.size(); } 109 |
121 /** Returns the number of free fp registers. */ | |
122 int numFreeFloatRegs() 123 { return freeFloatRegs.size(); } 124}; 125 126inline PhysRegIndex 127SimpleFreeList::getIntReg() 128{ | 110 int numFreeFloatRegs() 111 { return freeFloatRegs.size(); } 112}; 113 114inline PhysRegIndex 115SimpleFreeList::getIntReg() 116{ |
129 DPRINTF(FreeList, "Trying to get free integer register.\n"); 130 | 117 DPRINTF(Rename, "FreeList: Trying to get free integer register.\n"); |
131 if (freeIntRegs.empty()) { 132 panic("No free integer registers!"); 133 } 134 135 PhysRegIndex free_reg = freeIntRegs.front(); 136 137 freeIntRegs.pop(); 138 | 118 if (freeIntRegs.empty()) { 119 panic("No free integer registers!"); 120 } 121 122 PhysRegIndex free_reg = freeIntRegs.front(); 123 124 freeIntRegs.pop(); 125 |
126 // DEBUG 127 assert(freeIntRegsScoreboard[free_reg]); 128 freeIntRegsScoreboard[free_reg] = 0; 129 |
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139 return(free_reg); 140} 141 142inline PhysRegIndex 143SimpleFreeList::getFloatReg() 144{ | 130 return(free_reg); 131} 132 133inline PhysRegIndex 134SimpleFreeList::getFloatReg() 135{ |
145 DPRINTF(FreeList, "Trying to get free float register.\n"); 146 | 136 DPRINTF(Rename, "FreeList: Trying to get free float register.\n"); |
147 if (freeFloatRegs.empty()) { 148 panic("No free integer registers!"); 149 } 150 151 PhysRegIndex free_reg = freeFloatRegs.front(); 152 153 freeFloatRegs.pop(); 154 | 137 if (freeFloatRegs.empty()) { 138 panic("No free integer registers!"); 139 } 140 141 PhysRegIndex free_reg = freeFloatRegs.front(); 142 143 freeFloatRegs.pop(); 144 |
145 // DEBUG 146 assert(freeFloatRegsScoreboard[free_reg]); 147 freeFloatRegsScoreboard[free_reg] = 0; 148 |
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155 return(free_reg); 156} 157 158inline void 159SimpleFreeList::addReg(PhysRegIndex freed_reg) 160{ | 149 return(free_reg); 150} 151 152inline void 153SimpleFreeList::addReg(PhysRegIndex freed_reg) 154{ |
161 DPRINTF(FreeList,"Freeing register %i.\n", freed_reg); | 155 DPRINTF(Rename, "Freelist: Freeing register %i.\n", freed_reg); |
162 //Might want to add in a check for whether or not this register is 163 //already in there. A bit vector or something similar would be useful. 164 if (freed_reg < numPhysicalIntRegs) { | 156 //Might want to add in a check for whether or not this register is 157 //already in there. A bit vector or something similar would be useful. 158 if (freed_reg < numPhysicalIntRegs) { |
165 if (freed_reg != TheISA::ZeroReg) 166 freeIntRegs.push(freed_reg); | 159 freeIntRegs.push(freed_reg); 160 161 // DEBUG 162 assert(freeIntRegsScoreboard[freed_reg] == false); 163 freeIntRegsScoreboard[freed_reg] = 1; |
167 } else if (freed_reg < numPhysicalRegs) { | 164 } else if (freed_reg < numPhysicalRegs) { |
168 if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs)) 169 freeFloatRegs.push(freed_reg); | 165 freeFloatRegs.push(freed_reg); 166 167 // DEBUG 168 assert(freeFloatRegsScoreboard[freed_reg] == false); 169 freeFloatRegsScoreboard[freed_reg] = 1; |
170 } 171} 172 173inline void 174SimpleFreeList::addIntReg(PhysRegIndex freed_reg) 175{ | 170 } 171} 172 173inline void 174SimpleFreeList::addIntReg(PhysRegIndex freed_reg) 175{ |
176 DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg); | 176 DPRINTF(Rename, "Freelist: Freeing int register %i.\n", freed_reg); |
177 | 177 |
178 // DEBUG 179 assert(!freeIntRegsScoreboard[freed_reg]); 180 freeIntRegsScoreboard[freed_reg] = 1; 181 |
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178 freeIntRegs.push(freed_reg); 179} 180 181inline void 182SimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 183{ | 182 freeIntRegs.push(freed_reg); 183} 184 185inline void 186SimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 187{ |
184 DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg); | 188 DPRINTF(Rename, "Freelist: Freeing float register %i.\n", freed_reg); |
185 | 189 |
190 // DEBUG 191 assert(!freeFloatRegsScoreboard[freed_reg]); 192 freeFloatRegsScoreboard[freed_reg] = 1; 193 |
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186 freeFloatRegs.push(freed_reg); 187} 188 | 194 freeFloatRegs.push(freed_reg); 195} 196 |
189#endif // __CPU_O3_FREE_LIST_HH__ | 197#endif // __CPU_O3_CPU_FREE_LIST_HH__ |