1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * Copyright (c) 2013 Advanced Micro Devices, Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are 8 * met: redistributions of source code must retain the above copyright --- 92 unchanged lines hidden (view full) --- 101 const std::string _name; 102 103 /** The list of free integer registers. */ 104 SimpleFreeList intList; 105 106 /** The list of free floating point registers. */ 107 SimpleFreeList floatList; 108 |
109 /** The list of free condition-code registers. */ 110 SimpleFreeList ccList; 111 |
112 /** 113 * The register file object is used only to distinguish integer 114 * from floating-point physical register indices. 115 */ 116 PhysRegFile *regFile; 117 118 /* 119 * We give UnifiedRenameMap internal access so it can get at the --- 11 unchanged lines hidden (view full) --- 131 * @param reservedFloatRegs Number of fp registers already 132 * used by initial mappings. 133 */ 134 UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile); 135 136 /** Gives the name of the freelist. */ 137 std::string name() const { return _name; }; 138 |
139 /** Returns a pointer to the condition-code free list */ 140 SimpleFreeList *getCCList() { return &ccList; } 141 |
142 /** Gets a free integer register. */ 143 PhysRegIndex getIntReg() { return intList.getReg(); } 144 145 /** Gets a free fp register. */ 146 PhysRegIndex getFloatReg() { return floatList.getReg(); } 147 |
148 /** Gets a free cc register. */ 149 PhysRegIndex getCCReg() { return ccList.getReg(); } 150 |
151 /** Adds a register back to the free list. */ 152 void addReg(PhysRegIndex freed_reg); 153 154 /** Adds an integer register back to the free list. */ 155 void addIntReg(PhysRegIndex freed_reg) { intList.addReg(freed_reg); } 156 157 /** Adds a fp register back to the free list. */ 158 void addFloatReg(PhysRegIndex freed_reg) { floatList.addReg(freed_reg); } 159 |
160 /** Adds a cc register back to the free list. */ 161 void addCCReg(PhysRegIndex freed_reg) { ccList.addReg(freed_reg); } 162 |
163 /** Checks if there are any free integer registers. */ 164 bool hasFreeIntRegs() const { return intList.hasFreeRegs(); } 165 166 /** Checks if there are any free fp registers. */ 167 bool hasFreeFloatRegs() const { return floatList.hasFreeRegs(); } 168 |
169 /** Checks if there are any free cc registers. */ 170 bool hasFreeCCRegs() const { return ccList.hasFreeRegs(); } 171 |
172 /** Returns the number of free integer registers. */ 173 unsigned numFreeIntRegs() const { return intList.numFreeRegs(); } 174 175 /** Returns the number of free fp registers. */ 176 unsigned numFreeFloatRegs() const { return floatList.numFreeRegs(); } |
177 178 /** Returns the number of free cc registers. */ 179 unsigned numFreeCCRegs() const { return ccList.numFreeRegs(); } |
180}; 181 182inline void 183UnifiedFreeList::addReg(PhysRegIndex freed_reg) 184{ 185 DPRINTF(FreeList,"Freeing register %i.\n", freed_reg); 186 //Might want to add in a check for whether or not this register is 187 //already in there. A bit vector or something similar would be useful. 188 if (regFile->isIntPhysReg(freed_reg)) { 189 intList.addReg(freed_reg); |
190 } else if (regFile->isFloatPhysReg(freed_reg)) { |
191 floatList.addReg(freed_reg); |
192 } else { 193 assert(regFile->isCCPhysReg(freed_reg)); 194 ccList.addReg(freed_reg); |
195 } 196 197 // These assert conditions ensure that the number of free 198 // registers are not more than the # of total Physical Registers. 199 // If this were false, it would mean that registers 200 // have been freed twice, overflowing the free register 201 // pool and potentially crashing SMT workloads. 202 // ---- 203 // Comment out for now so as to not potentially break 204 // CMP and single-threaded workloads 205 // ---- 206 // assert(freeIntRegs.size() <= numPhysicalIntRegs); 207 // assert(freeFloatRegs.size() <= numPhysicalFloatRegs); 208} 209 210 211#endif // __CPU_O3_FREE_LIST_HH__ |