1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
| 1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are
7 * met: redistributions of source code must retain the above copyright
8 * notice, this list of conditions and the following disclaimer;
9 * redistributions in binary form must reproduce the above copyright
10 * notice, this list of conditions and the following disclaimer in the
11 * documentation and/or other materials provided with the distribution;
12 * neither the name of the copyright holders nor the names of its
13 * contributors may be used to endorse or promote products derived from
14 * this software without specific prior written permission.
15 *
16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
27 */
28
29#ifndef __CPU_O3_FREE_LIST_HH__
30#define __CPU_O3_FREE_LIST_HH__
31
32#include <iostream>
33#include <queue>
34
35#include "arch/isa_traits.hh"
36#include "base/misc.hh"
37#include "base/trace.hh"
38#include "base/traceflags.hh"
39#include "cpu/o3/comm.hh"
40
41/**
42 * FreeList class that simply holds the list of free integer and floating
43 * point registers. Can request for a free register of either type, and
44 * also send back free registers of either type. This is a very simple
45 * class, but it should be sufficient for most implementations. Like all
46 * other classes, it assumes that the indices for the floating point
47 * registers starts after the integer registers end. Hence the variable
48 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
49 * Note that while this most likely should be called FreeList, the name
50 * "FreeList" is used in a typedef within the CPU Policy, and therefore no
51 * class can be named simply "FreeList".
52 * @todo: Give a better name to the base FP dependency.
53 */
54class SimpleFreeList
55{
56 private:
57 /** The list of free integer registers. */
58 std::queue<PhysRegIndex> freeIntRegs;
59
60 /** The list of free floating point registers. */
61 std::queue<PhysRegIndex> freeFloatRegs;
62
63 /** Number of logical integer registers. */
64 int numLogicalIntRegs;
65
66 /** Number of physical integer registers. */
67 int numPhysicalIntRegs;
68
69 /** Number of logical floating point registers. */
70 int numLogicalFloatRegs;
71
72 /** Number of physical floating point registers. */
73 int numPhysicalFloatRegs;
74
75 /** Total number of physical registers. */
76 int numPhysicalRegs;
77
78 public:
79 /** Constructs a free list.
80 * @param activeThreads Number of active threads.
81 * @param _numLogicalIntRegs Number of logical integer registers.
82 * @param _numPhysicalIntRegs Number of physical integer registers.
83 * @param _numLogicalFloatRegs Number of logical fp registers.
84 * @param _numPhysicalFloatRegs Number of physical fp registers.
85 */
86 SimpleFreeList(unsigned activeThreads,
87 unsigned _numLogicalIntRegs,
88 unsigned _numPhysicalIntRegs,
89 unsigned _numLogicalFloatRegs,
90 unsigned _numPhysicalFloatRegs);
91
92 /** Gives the name of the freelist. */
93 std::string name() const;
94
95 /** Gets a free integer register. */
96 inline PhysRegIndex getIntReg();
97
98 /** Gets a free fp register. */
99 inline PhysRegIndex getFloatReg();
100
101 /** Adds a register back to the free list. */
102 inline void addReg(PhysRegIndex freed_reg);
103
104 /** Adds an integer register back to the free list. */
105 inline void addIntReg(PhysRegIndex freed_reg);
106
107 /** Adds a fp register back to the free list. */
108 inline void addFloatReg(PhysRegIndex freed_reg);
109
110 /** Checks if there are any free integer registers. */
111 bool hasFreeIntRegs()
112 { return !freeIntRegs.empty(); }
113
114 /** Checks if there are any free fp registers. */
115 bool hasFreeFloatRegs()
116 { return !freeFloatRegs.empty(); }
117
118 /** Returns the number of free integer registers. */
119 int numFreeIntRegs()
120 { return freeIntRegs.size(); }
121
122 /** Returns the number of free fp registers. */
123 int numFreeFloatRegs()
124 { return freeFloatRegs.size(); }
125};
126
127inline PhysRegIndex
128SimpleFreeList::getIntReg()
129{
130 DPRINTF(FreeList, "Trying to get free integer register.\n");
131
132 if (freeIntRegs.empty()) {
133 panic("No free integer registers!");
134 }
135
136 PhysRegIndex free_reg = freeIntRegs.front();
137
138 freeIntRegs.pop();
139
140 return(free_reg);
141}
142
143inline PhysRegIndex
144SimpleFreeList::getFloatReg()
145{
146 DPRINTF(FreeList, "Trying to get free float register.\n");
147
148 if (freeFloatRegs.empty()) {
149 panic("No free integer registers!");
150 }
151
152 PhysRegIndex free_reg = freeFloatRegs.front();
153
154 freeFloatRegs.pop();
155
156 return(free_reg);
157}
158
159inline void
160SimpleFreeList::addReg(PhysRegIndex freed_reg)
161{
162 DPRINTF(FreeList,"Freeing register %i.\n", freed_reg);
163 //Might want to add in a check for whether or not this register is
164 //already in there. A bit vector or something similar would be useful.
165 if (freed_reg < numPhysicalIntRegs) {
166 if (freed_reg != TheISA::ZeroReg)
167 freeIntRegs.push(freed_reg);
168 } else if (freed_reg < numPhysicalRegs) {
169 if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs))
170 freeFloatRegs.push(freed_reg);
171 }
172}
173
174inline void
175SimpleFreeList::addIntReg(PhysRegIndex freed_reg)
176{
177 DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg);
178
179 freeIntRegs.push(freed_reg);
180}
181
182inline void
183SimpleFreeList::addFloatReg(PhysRegIndex freed_reg)
184{
185 DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg);
186
187 freeFloatRegs.push(freed_reg);
188}
189
190#endif // __CPU_O3_FREE_LIST_HH__
| 29 */
30
31#ifndef __CPU_O3_FREE_LIST_HH__
32#define __CPU_O3_FREE_LIST_HH__
33
34#include <iostream>
35#include <queue>
36
37#include "arch/isa_traits.hh"
38#include "base/misc.hh"
39#include "base/trace.hh"
40#include "base/traceflags.hh"
41#include "cpu/o3/comm.hh"
42
43/**
44 * FreeList class that simply holds the list of free integer and floating
45 * point registers. Can request for a free register of either type, and
46 * also send back free registers of either type. This is a very simple
47 * class, but it should be sufficient for most implementations. Like all
48 * other classes, it assumes that the indices for the floating point
49 * registers starts after the integer registers end. Hence the variable
50 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
51 * Note that while this most likely should be called FreeList, the name
52 * "FreeList" is used in a typedef within the CPU Policy, and therefore no
53 * class can be named simply "FreeList".
54 * @todo: Give a better name to the base FP dependency.
55 */
56class SimpleFreeList
57{
58 private:
59 /** The list of free integer registers. */
60 std::queue<PhysRegIndex> freeIntRegs;
61
62 /** The list of free floating point registers. */
63 std::queue<PhysRegIndex> freeFloatRegs;
64
65 /** Number of logical integer registers. */
66 int numLogicalIntRegs;
67
68 /** Number of physical integer registers. */
69 int numPhysicalIntRegs;
70
71 /** Number of logical floating point registers. */
72 int numLogicalFloatRegs;
73
74 /** Number of physical floating point registers. */
75 int numPhysicalFloatRegs;
76
77 /** Total number of physical registers. */
78 int numPhysicalRegs;
79
80 public:
81 /** Constructs a free list.
82 * @param activeThreads Number of active threads.
83 * @param _numLogicalIntRegs Number of logical integer registers.
84 * @param _numPhysicalIntRegs Number of physical integer registers.
85 * @param _numLogicalFloatRegs Number of logical fp registers.
86 * @param _numPhysicalFloatRegs Number of physical fp registers.
87 */
88 SimpleFreeList(unsigned activeThreads,
89 unsigned _numLogicalIntRegs,
90 unsigned _numPhysicalIntRegs,
91 unsigned _numLogicalFloatRegs,
92 unsigned _numPhysicalFloatRegs);
93
94 /** Gives the name of the freelist. */
95 std::string name() const;
96
97 /** Gets a free integer register. */
98 inline PhysRegIndex getIntReg();
99
100 /** Gets a free fp register. */
101 inline PhysRegIndex getFloatReg();
102
103 /** Adds a register back to the free list. */
104 inline void addReg(PhysRegIndex freed_reg);
105
106 /** Adds an integer register back to the free list. */
107 inline void addIntReg(PhysRegIndex freed_reg);
108
109 /** Adds a fp register back to the free list. */
110 inline void addFloatReg(PhysRegIndex freed_reg);
111
112 /** Checks if there are any free integer registers. */
113 bool hasFreeIntRegs()
114 { return !freeIntRegs.empty(); }
115
116 /** Checks if there are any free fp registers. */
117 bool hasFreeFloatRegs()
118 { return !freeFloatRegs.empty(); }
119
120 /** Returns the number of free integer registers. */
121 int numFreeIntRegs()
122 { return freeIntRegs.size(); }
123
124 /** Returns the number of free fp registers. */
125 int numFreeFloatRegs()
126 { return freeFloatRegs.size(); }
127};
128
129inline PhysRegIndex
130SimpleFreeList::getIntReg()
131{
132 DPRINTF(FreeList, "Trying to get free integer register.\n");
133
134 if (freeIntRegs.empty()) {
135 panic("No free integer registers!");
136 }
137
138 PhysRegIndex free_reg = freeIntRegs.front();
139
140 freeIntRegs.pop();
141
142 return(free_reg);
143}
144
145inline PhysRegIndex
146SimpleFreeList::getFloatReg()
147{
148 DPRINTF(FreeList, "Trying to get free float register.\n");
149
150 if (freeFloatRegs.empty()) {
151 panic("No free integer registers!");
152 }
153
154 PhysRegIndex free_reg = freeFloatRegs.front();
155
156 freeFloatRegs.pop();
157
158 return(free_reg);
159}
160
161inline void
162SimpleFreeList::addReg(PhysRegIndex freed_reg)
163{
164 DPRINTF(FreeList,"Freeing register %i.\n", freed_reg);
165 //Might want to add in a check for whether or not this register is
166 //already in there. A bit vector or something similar would be useful.
167 if (freed_reg < numPhysicalIntRegs) {
168 if (freed_reg != TheISA::ZeroReg)
169 freeIntRegs.push(freed_reg);
170 } else if (freed_reg < numPhysicalRegs) {
171 if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs))
172 freeFloatRegs.push(freed_reg);
173 }
174}
175
176inline void
177SimpleFreeList::addIntReg(PhysRegIndex freed_reg)
178{
179 DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg);
180
181 freeIntRegs.push(freed_reg);
182}
183
184inline void
185SimpleFreeList::addFloatReg(PhysRegIndex freed_reg)
186{
187 DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg);
188
189 freeFloatRegs.push(freed_reg);
190}
191
192#endif // __CPU_O3_FREE_LIST_HH__
|