1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28
| 1/* 2 * Copyright (c) 2004-2005 The Regents of The University of Michigan 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions are 7 * met: redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer; 9 * redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution; 12 * neither the name of the copyright holders nor the names of its 13 * contributors may be used to endorse or promote products derived from 14 * this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 17 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 18 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 19 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 20 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 21 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 22 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 23 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 24 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 25 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 26 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 */ 28
|
29#ifndef __CPU_O3_CPU_FREE_LIST_HH__ 30#define __CPU_O3_CPU_FREE_LIST_HH__
| 29#ifndef __CPU_O3_FREE_LIST_HH__ 30#define __CPU_O3_FREE_LIST_HH__
|
31 32#include <iostream> 33#include <queue> 34 35#include "arch/isa_traits.hh" 36#include "base/trace.hh" 37#include "base/traceflags.hh" 38#include "cpu/o3/comm.hh" 39 40/** 41 * FreeList class that simply holds the list of free integer and floating 42 * point registers. Can request for a free register of either type, and 43 * also send back free registers of either type. This is a very simple 44 * class, but it should be sufficient for most implementations. Like all 45 * other classes, it assumes that the indices for the floating point 46 * registers starts after the integer registers end. Hence the variable 47 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
| 31 32#include <iostream> 33#include <queue> 34 35#include "arch/isa_traits.hh" 36#include "base/trace.hh" 37#include "base/traceflags.hh" 38#include "cpu/o3/comm.hh" 39 40/** 41 * FreeList class that simply holds the list of free integer and floating 42 * point registers. Can request for a free register of either type, and 43 * also send back free registers of either type. This is a very simple 44 * class, but it should be sufficient for most implementations. Like all 45 * other classes, it assumes that the indices for the floating point 46 * registers starts after the integer registers end. Hence the variable 47 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
|
48 * Note that 49 * while this most likely should be called FreeList, the name "FreeList" 50 * is used in a typedef within the CPU Policy, and therefore no class 51 * can be named simply "FreeList".
| 48 * Note that while this most likely should be called FreeList, the name 49 * "FreeList" is used in a typedef within the CPU Policy, and therefore no 50 * class can be named simply "FreeList".
|
52 * @todo: Give a better name to the base FP dependency. 53 */ 54class SimpleFreeList 55{ 56 private: 57 /** The list of free integer registers. */ 58 std::queue<PhysRegIndex> freeIntRegs; 59 60 /** The list of free floating point registers. */ 61 std::queue<PhysRegIndex> freeFloatRegs; 62 63 /** Number of logical integer registers. */ 64 int numLogicalIntRegs; 65 66 /** Number of physical integer registers. */ 67 int numPhysicalIntRegs; 68 69 /** Number of logical floating point registers. */ 70 int numLogicalFloatRegs; 71 72 /** Number of physical floating point registers. */ 73 int numPhysicalFloatRegs; 74 75 /** Total number of physical registers. */ 76 int numPhysicalRegs; 77
| 51 * @todo: Give a better name to the base FP dependency. 52 */ 53class SimpleFreeList 54{ 55 private: 56 /** The list of free integer registers. */ 57 std::queue<PhysRegIndex> freeIntRegs; 58 59 /** The list of free floating point registers. */ 60 std::queue<PhysRegIndex> freeFloatRegs; 61 62 /** Number of logical integer registers. */ 63 int numLogicalIntRegs; 64 65 /** Number of physical integer registers. */ 66 int numPhysicalIntRegs; 67 68 /** Number of logical floating point registers. */ 69 int numLogicalFloatRegs; 70 71 /** Number of physical floating point registers. */ 72 int numPhysicalFloatRegs; 73 74 /** Total number of physical registers. */ 75 int numPhysicalRegs; 76
|
78 /** DEBUG stuff below. */ 79 std::vector<int> freeIntRegsScoreboard; 80 81 std::vector<bool> freeFloatRegsScoreboard; 82
| |
83 public:
| 77 public:
|
84 SimpleFreeList(unsigned _numLogicalIntRegs,
| 78 /** Constructs a free list. 79 * @param activeThreads Number of active threads. 80 * @param _numLogicalIntRegs Number of logical integer registers. 81 * @param _numPhysicalIntRegs Number of physical integer registers. 82 * @param _numLogicalFloatRegs Number of logical fp registers. 83 * @param _numPhysicalFloatRegs Number of physical fp registers. 84 */ 85 SimpleFreeList(unsigned activeThreads, 86 unsigned _numLogicalIntRegs,
|
85 unsigned _numPhysicalIntRegs, 86 unsigned _numLogicalFloatRegs, 87 unsigned _numPhysicalFloatRegs); 88
| 87 unsigned _numPhysicalIntRegs, 88 unsigned _numLogicalFloatRegs, 89 unsigned _numPhysicalFloatRegs); 90
|
| 91 /** Gives the name of the freelist. */ 92 std::string name() const; 93 94 /** Gets a free integer register. */
|
89 inline PhysRegIndex getIntReg(); 90
| 95 inline PhysRegIndex getIntReg(); 96
|
| 97 /** Gets a free fp register. */
|
91 inline PhysRegIndex getFloatReg(); 92
| 98 inline PhysRegIndex getFloatReg(); 99
|
| 100 /** Adds a register back to the free list. */
|
93 inline void addReg(PhysRegIndex freed_reg); 94
| 101 inline void addReg(PhysRegIndex freed_reg); 102
|
| 103 /** Adds an integer register back to the free list. */
|
95 inline void addIntReg(PhysRegIndex freed_reg); 96
| 104 inline void addIntReg(PhysRegIndex freed_reg); 105
|
| 106 /** Adds a fp register back to the free list. */
|
97 inline void addFloatReg(PhysRegIndex freed_reg); 98
| 107 inline void addFloatReg(PhysRegIndex freed_reg); 108
|
| 109 /** Checks if there are any free integer registers. */
|
99 bool hasFreeIntRegs() 100 { return !freeIntRegs.empty(); } 101
| 110 bool hasFreeIntRegs() 111 { return !freeIntRegs.empty(); } 112
|
| 113 /** Checks if there are any free fp registers. */
|
102 bool hasFreeFloatRegs() 103 { return !freeFloatRegs.empty(); } 104
| 114 bool hasFreeFloatRegs() 115 { return !freeFloatRegs.empty(); } 116
|
| 117 /** Returns the number of free integer registers. */
|
105 int numFreeIntRegs() 106 { return freeIntRegs.size(); } 107
| 118 int numFreeIntRegs() 119 { return freeIntRegs.size(); } 120
|
| 121 /** Returns the number of free fp registers. */
|
108 int numFreeFloatRegs() 109 { return freeFloatRegs.size(); } 110}; 111 112inline PhysRegIndex 113SimpleFreeList::getIntReg() 114{
| 122 int numFreeFloatRegs() 123 { return freeFloatRegs.size(); } 124}; 125 126inline PhysRegIndex 127SimpleFreeList::getIntReg() 128{
|
115 DPRINTF(Rename, "FreeList: Trying to get free integer register.\n");
| 129 DPRINTF(FreeList, "Trying to get free integer register.\n"); 130
|
116 if (freeIntRegs.empty()) { 117 panic("No free integer registers!"); 118 } 119 120 PhysRegIndex free_reg = freeIntRegs.front(); 121 122 freeIntRegs.pop(); 123
| 131 if (freeIntRegs.empty()) { 132 panic("No free integer registers!"); 133 } 134 135 PhysRegIndex free_reg = freeIntRegs.front(); 136 137 freeIntRegs.pop(); 138
|
124 // DEBUG 125 assert(freeIntRegsScoreboard[free_reg]); 126 freeIntRegsScoreboard[free_reg] = 0; 127
| |
128 return(free_reg); 129} 130 131inline PhysRegIndex 132SimpleFreeList::getFloatReg() 133{
| 139 return(free_reg); 140} 141 142inline PhysRegIndex 143SimpleFreeList::getFloatReg() 144{
|
134 DPRINTF(Rename, "FreeList: Trying to get free float register.\n");
| 145 DPRINTF(FreeList, "Trying to get free float register.\n"); 146
|
135 if (freeFloatRegs.empty()) { 136 panic("No free integer registers!"); 137 } 138 139 PhysRegIndex free_reg = freeFloatRegs.front(); 140 141 freeFloatRegs.pop(); 142
| 147 if (freeFloatRegs.empty()) { 148 panic("No free integer registers!"); 149 } 150 151 PhysRegIndex free_reg = freeFloatRegs.front(); 152 153 freeFloatRegs.pop(); 154
|
143 // DEBUG 144 assert(freeFloatRegsScoreboard[free_reg]); 145 freeFloatRegsScoreboard[free_reg] = 0; 146
| |
147 return(free_reg); 148} 149 150inline void 151SimpleFreeList::addReg(PhysRegIndex freed_reg) 152{
| 155 return(free_reg); 156} 157 158inline void 159SimpleFreeList::addReg(PhysRegIndex freed_reg) 160{
|
153 DPRINTF(Rename, "Freelist: Freeing register %i.\n", freed_reg);
| 161 DPRINTF(FreeList,"Freeing register %i.\n", freed_reg);
|
154 //Might want to add in a check for whether or not this register is 155 //already in there. A bit vector or something similar would be useful. 156 if (freed_reg < numPhysicalIntRegs) {
| 162 //Might want to add in a check for whether or not this register is 163 //already in there. A bit vector or something similar would be useful. 164 if (freed_reg < numPhysicalIntRegs) {
|
157 freeIntRegs.push(freed_reg); 158 159 // DEBUG 160 assert(freeIntRegsScoreboard[freed_reg] == false); 161 freeIntRegsScoreboard[freed_reg] = 1;
| 165 if (freed_reg != TheISA::ZeroReg) 166 freeIntRegs.push(freed_reg);
|
162 } else if (freed_reg < numPhysicalRegs) {
| 167 } else if (freed_reg < numPhysicalRegs) {
|
163 freeFloatRegs.push(freed_reg); 164 165 // DEBUG 166 assert(freeFloatRegsScoreboard[freed_reg] == false); 167 freeFloatRegsScoreboard[freed_reg] = 1;
| 168 if (freed_reg != (TheISA::ZeroReg + numPhysicalIntRegs)) 169 freeFloatRegs.push(freed_reg);
|
168 } 169} 170 171inline void 172SimpleFreeList::addIntReg(PhysRegIndex freed_reg) 173{
| 170 } 171} 172 173inline void 174SimpleFreeList::addIntReg(PhysRegIndex freed_reg) 175{
|
174 DPRINTF(Rename, "Freelist: Freeing int register %i.\n", freed_reg);
| 176 DPRINTF(FreeList,"Freeing int register %i.\n", freed_reg);
|
175
| 177
|
176 // DEBUG 177 assert(!freeIntRegsScoreboard[freed_reg]); 178 freeIntRegsScoreboard[freed_reg] = 1; 179
| |
180 freeIntRegs.push(freed_reg); 181} 182 183inline void 184SimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 185{
| 178 freeIntRegs.push(freed_reg); 179} 180 181inline void 182SimpleFreeList::addFloatReg(PhysRegIndex freed_reg) 183{
|
186 DPRINTF(Rename, "Freelist: Freeing float register %i.\n", freed_reg);
| 184 DPRINTF(FreeList,"Freeing float register %i.\n", freed_reg);
|
187
| 185
|
188 // DEBUG 189 assert(!freeFloatRegsScoreboard[freed_reg]); 190 freeFloatRegsScoreboard[freed_reg] = 1; 191
| |
192 freeFloatRegs.push(freed_reg); 193} 194
| 186 freeFloatRegs.push(freed_reg); 187} 188
|
195#endif // __CPU_O3_CPU_FREE_LIST_HH__
| 189#endif // __CPU_O3_FREE_LIST_HH__
|
| |