free_list.hh (12105:742d80361989) free_list.hh (12106:7784fac1b159)
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Kevin Lim
30 */
31
32#ifndef __CPU_O3_FREE_LIST_HH__
33#define __CPU_O3_FREE_LIST_HH__
34
35#include <iostream>
36#include <queue>
37#include <vector>
38
39#include "base/misc.hh"
40#include "base/trace.hh"
41#include "cpu/o3/comm.hh"
42#include "cpu/o3/regfile.hh"
43#include "debug/FreeList.hh"
44
45/**
46 * Free list for a single class of registers (e.g., integer
47 * or floating point). Because the register class is implicitly
48 * determined by the rename map instance being accessed, all
49 * architectural register index parameters and values in this class
50 * are relative (e.g., %fp2 is just index 2).
51 */
52class SimpleFreeList
53{
54 private:
55
56 /** The actual free list */
57 std::queue<PhysRegIdPtr> freeRegs;
58
59 public:
60
61 SimpleFreeList() {};
62
63 /** Add a physical register to the free list */
64 void addReg(PhysRegIdPtr reg) { freeRegs.push(reg); }
65
66 /** Get the next available register from the free list */
67 PhysRegIdPtr getReg()
68 {
69 assert(!freeRegs.empty());
70 PhysRegIdPtr free_reg = freeRegs.front();
71 freeRegs.pop();
72 return free_reg;
73 }
74
75 /** Return the number of free registers on the list. */
76 unsigned numFreeRegs() const { return freeRegs.size(); }
77
78 /** True iff there are free registers on the list. */
79 bool hasFreeRegs() const { return !freeRegs.empty(); }
80};
81
82
83/**
84 * FreeList class that simply holds the list of free integer and floating
85 * point registers. Can request for a free register of either type, and
86 * also send back free registers of either type. This is a very simple
87 * class, but it should be sufficient for most implementations. Like all
88 * other classes, it assumes that the indices for the floating point
89 * registers starts after the integer registers end. Hence the variable
90 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
91 * Note that while this most likely should be called FreeList, the name
92 * "FreeList" is used in a typedef within the CPU Policy, and therefore no
93 * class can be named simply "FreeList".
94 * @todo: Give a better name to the base FP dependency.
95 */
96class UnifiedFreeList
97{
98 private:
99
100 /** The object name, for DPRINTF. We have to declare this
101 * explicitly because Scoreboard is not a SimObject. */
102 const std::string _name;
103
104 /** The list of free integer registers. */
105 SimpleFreeList intList;
106
107 /** The list of free floating point registers. */
108 SimpleFreeList floatList;
109
110 /** The list of free condition-code registers. */
111 SimpleFreeList ccList;
112
113 /**
114 * The register file object is used only to distinguish integer
115 * from floating-point physical register indices.
116 */
117 PhysRegFile *regFile;
118
119 /*
120 * We give UnifiedRenameMap internal access so it can get at the
121 * internal per-class free lists and associate those with its
122 * per-class rename maps. See UnifiedRenameMap::init().
123 */
124 friend class UnifiedRenameMap;
125
126 public:
127 /** Constructs a free list.
128 * @param _numPhysicalIntRegs Number of physical integer registers.
129 * @param reservedIntRegs Number of integer registers already
130 * used by initial mappings.
131 * @param _numPhysicalFloatRegs Number of physical fp registers.
132 * @param reservedFloatRegs Number of fp registers already
133 * used by initial mappings.
134 */
135 UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile);
136
137 /** Gives the name of the freelist. */
138 std::string name() const { return _name; };
139
140 /** Returns a pointer to the condition-code free list */
141 SimpleFreeList *getCCList() { return &ccList; }
142
143 /** Gets a free integer register. */
144 PhysRegIdPtr getIntReg() { return intList.getReg(); }
145
146 /** Gets a free fp register. */
147 PhysRegIdPtr getFloatReg() { return floatList.getReg(); }
148
149 /** Gets a free cc register. */
150 PhysRegIdPtr getCCReg() { return ccList.getReg(); }
151
152 /** Adds a register back to the free list. */
153 void addReg(PhysRegIdPtr freed_reg);
154
155 /** Adds an integer register back to the free list. */
156 void addIntReg(PhysRegIdPtr freed_reg) { intList.addReg(freed_reg); }
157
158 /** Adds a fp register back to the free list. */
159 void addFloatReg(PhysRegIdPtr freed_reg) { floatList.addReg(freed_reg); }
160
161 /** Adds a cc register back to the free list. */
162 void addCCReg(PhysRegIdPtr freed_reg) { ccList.addReg(freed_reg); }
163
164 /** Checks if there are any free integer registers. */
165 bool hasFreeIntRegs() const { return intList.hasFreeRegs(); }
166
167 /** Checks if there are any free fp registers. */
168 bool hasFreeFloatRegs() const { return floatList.hasFreeRegs(); }
169
170 /** Checks if there are any free cc registers. */
171 bool hasFreeCCRegs() const { return ccList.hasFreeRegs(); }
172
173 /** Returns the number of free integer registers. */
174 unsigned numFreeIntRegs() const { return intList.numFreeRegs(); }
175
176 /** Returns the number of free fp registers. */
177 unsigned numFreeFloatRegs() const { return floatList.numFreeRegs(); }
178
179 /** Returns the number of free cc registers. */
180 unsigned numFreeCCRegs() const { return ccList.numFreeRegs(); }
181};
182
183inline void
184UnifiedFreeList::addReg(PhysRegIdPtr freed_reg)
185{
1/*
2 * Copyright (c) 2004-2005 The Regents of The University of Michigan
3 * Copyright (c) 2013 Advanced Micro Devices, Inc.
4 * All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions are
8 * met: redistributions of source code must retain the above copyright
9 * notice, this list of conditions and the following disclaimer;
10 * redistributions in binary form must reproduce the above copyright
11 * notice, this list of conditions and the following disclaimer in the
12 * documentation and/or other materials provided with the distribution;
13 * neither the name of the copyright holders nor the names of its
14 * contributors may be used to endorse or promote products derived from
15 * this software without specific prior written permission.
16 *
17 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
18 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
19 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
20 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
21 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
22 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
23 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
27 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
28 *
29 * Authors: Kevin Lim
30 */
31
32#ifndef __CPU_O3_FREE_LIST_HH__
33#define __CPU_O3_FREE_LIST_HH__
34
35#include <iostream>
36#include <queue>
37#include <vector>
38
39#include "base/misc.hh"
40#include "base/trace.hh"
41#include "cpu/o3/comm.hh"
42#include "cpu/o3/regfile.hh"
43#include "debug/FreeList.hh"
44
45/**
46 * Free list for a single class of registers (e.g., integer
47 * or floating point). Because the register class is implicitly
48 * determined by the rename map instance being accessed, all
49 * architectural register index parameters and values in this class
50 * are relative (e.g., %fp2 is just index 2).
51 */
52class SimpleFreeList
53{
54 private:
55
56 /** The actual free list */
57 std::queue<PhysRegIdPtr> freeRegs;
58
59 public:
60
61 SimpleFreeList() {};
62
63 /** Add a physical register to the free list */
64 void addReg(PhysRegIdPtr reg) { freeRegs.push(reg); }
65
66 /** Get the next available register from the free list */
67 PhysRegIdPtr getReg()
68 {
69 assert(!freeRegs.empty());
70 PhysRegIdPtr free_reg = freeRegs.front();
71 freeRegs.pop();
72 return free_reg;
73 }
74
75 /** Return the number of free registers on the list. */
76 unsigned numFreeRegs() const { return freeRegs.size(); }
77
78 /** True iff there are free registers on the list. */
79 bool hasFreeRegs() const { return !freeRegs.empty(); }
80};
81
82
83/**
84 * FreeList class that simply holds the list of free integer and floating
85 * point registers. Can request for a free register of either type, and
86 * also send back free registers of either type. This is a very simple
87 * class, but it should be sufficient for most implementations. Like all
88 * other classes, it assumes that the indices for the floating point
89 * registers starts after the integer registers end. Hence the variable
90 * numPhysicalIntRegs is logically equivalent to the baseFP dependency.
91 * Note that while this most likely should be called FreeList, the name
92 * "FreeList" is used in a typedef within the CPU Policy, and therefore no
93 * class can be named simply "FreeList".
94 * @todo: Give a better name to the base FP dependency.
95 */
96class UnifiedFreeList
97{
98 private:
99
100 /** The object name, for DPRINTF. We have to declare this
101 * explicitly because Scoreboard is not a SimObject. */
102 const std::string _name;
103
104 /** The list of free integer registers. */
105 SimpleFreeList intList;
106
107 /** The list of free floating point registers. */
108 SimpleFreeList floatList;
109
110 /** The list of free condition-code registers. */
111 SimpleFreeList ccList;
112
113 /**
114 * The register file object is used only to distinguish integer
115 * from floating-point physical register indices.
116 */
117 PhysRegFile *regFile;
118
119 /*
120 * We give UnifiedRenameMap internal access so it can get at the
121 * internal per-class free lists and associate those with its
122 * per-class rename maps. See UnifiedRenameMap::init().
123 */
124 friend class UnifiedRenameMap;
125
126 public:
127 /** Constructs a free list.
128 * @param _numPhysicalIntRegs Number of physical integer registers.
129 * @param reservedIntRegs Number of integer registers already
130 * used by initial mappings.
131 * @param _numPhysicalFloatRegs Number of physical fp registers.
132 * @param reservedFloatRegs Number of fp registers already
133 * used by initial mappings.
134 */
135 UnifiedFreeList(const std::string &_my_name, PhysRegFile *_regFile);
136
137 /** Gives the name of the freelist. */
138 std::string name() const { return _name; };
139
140 /** Returns a pointer to the condition-code free list */
141 SimpleFreeList *getCCList() { return &ccList; }
142
143 /** Gets a free integer register. */
144 PhysRegIdPtr getIntReg() { return intList.getReg(); }
145
146 /** Gets a free fp register. */
147 PhysRegIdPtr getFloatReg() { return floatList.getReg(); }
148
149 /** Gets a free cc register. */
150 PhysRegIdPtr getCCReg() { return ccList.getReg(); }
151
152 /** Adds a register back to the free list. */
153 void addReg(PhysRegIdPtr freed_reg);
154
155 /** Adds an integer register back to the free list. */
156 void addIntReg(PhysRegIdPtr freed_reg) { intList.addReg(freed_reg); }
157
158 /** Adds a fp register back to the free list. */
159 void addFloatReg(PhysRegIdPtr freed_reg) { floatList.addReg(freed_reg); }
160
161 /** Adds a cc register back to the free list. */
162 void addCCReg(PhysRegIdPtr freed_reg) { ccList.addReg(freed_reg); }
163
164 /** Checks if there are any free integer registers. */
165 bool hasFreeIntRegs() const { return intList.hasFreeRegs(); }
166
167 /** Checks if there are any free fp registers. */
168 bool hasFreeFloatRegs() const { return floatList.hasFreeRegs(); }
169
170 /** Checks if there are any free cc registers. */
171 bool hasFreeCCRegs() const { return ccList.hasFreeRegs(); }
172
173 /** Returns the number of free integer registers. */
174 unsigned numFreeIntRegs() const { return intList.numFreeRegs(); }
175
176 /** Returns the number of free fp registers. */
177 unsigned numFreeFloatRegs() const { return floatList.numFreeRegs(); }
178
179 /** Returns the number of free cc registers. */
180 unsigned numFreeCCRegs() const { return ccList.numFreeRegs(); }
181};
182
183inline void
184UnifiedFreeList::addReg(PhysRegIdPtr freed_reg)
185{
186 DPRINTF(FreeList,"Freeing register %i (%s).\n", freed_reg->regIdx,
187 RegClassStrings[freed_reg->regClass]);
186 DPRINTF(FreeList,"Freeing register %i (%s).\n", freed_reg->index(),
187 freed_reg->className());
188 //Might want to add in a check for whether or not this register is
189 //already in there. A bit vector or something similar would be useful.
188 //Might want to add in a check for whether or not this register is
189 //already in there. A bit vector or something similar would be useful.
190 switch (freed_reg->regClass) {
190 switch (freed_reg->classValue()) {
191 case IntRegClass:
192 intList.addReg(freed_reg);
193 break;
194 case FloatRegClass:
195 floatList.addReg(freed_reg);
196 break;
197 case CCRegClass:
198 ccList.addReg(freed_reg);
199 break;
200 default:
201 panic("Unexpected RegClass (%s)",
191 case IntRegClass:
192 intList.addReg(freed_reg);
193 break;
194 case FloatRegClass:
195 floatList.addReg(freed_reg);
196 break;
197 case CCRegClass:
198 ccList.addReg(freed_reg);
199 break;
200 default:
201 panic("Unexpected RegClass (%s)",
202 RegClassStrings[freed_reg->regClass]);
202 freed_reg->className());
203 }
204
205 // These assert conditions ensure that the number of free
206 // registers are not more than the # of total Physical Registers.
207 // If this were false, it would mean that registers
208 // have been freed twice, overflowing the free register
209 // pool and potentially crashing SMT workloads.
210 // ----
211 // Comment out for now so as to not potentially break
212 // CMP and single-threaded workloads
213 // ----
214 // assert(freeIntRegs.size() <= numPhysicalIntRegs);
215 // assert(freeFloatRegs.size() <= numPhysicalFloatRegs);
216}
217
218
219#endif // __CPU_O3_FREE_LIST_HH__
203 }
204
205 // These assert conditions ensure that the number of free
206 // registers are not more than the # of total Physical Registers.
207 // If this were false, it would mean that registers
208 // have been freed twice, overflowing the free register
209 // pool and potentially crashing SMT workloads.
210 // ----
211 // Comment out for now so as to not potentially break
212 // CMP and single-threaded workloads
213 // ----
214 // assert(freeIntRegs.size() <= numPhysicalIntRegs);
215 // assert(freeFloatRegs.size() <= numPhysicalFloatRegs);
216}
217
218
219#endif // __CPU_O3_FREE_LIST_HH__