fetch_impl.hh (8931:7a1dfb191e3f) fetch_impl.hh (8949:3fa1ee293096)
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

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606 mem_req->getPaddr());
607 fetchStatus[tid] = NoGoodAddr;
608 delete mem_req;
609 memReq[tid] = NULL;
610 return;
611 }
612
613 // Build packet here.
1/*
2 * Copyright (c) 2010-2011 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 597 unchanged lines hidden (view full) ---

606 mem_req->getPaddr());
607 fetchStatus[tid] = NoGoodAddr;
608 delete mem_req;
609 memReq[tid] = NULL;
610 return;
611 }
612
613 // Build packet here.
614 PacketPtr data_pkt = new Packet(mem_req,
615 MemCmd::ReadReq, Packet::Broadcast);
614 PacketPtr data_pkt = new Packet(mem_req, MemCmd::ReadReq);
616 data_pkt->dataDynamicArray(new uint8_t[cacheBlkSize]);
617
618 cacheDataPC[tid] = block_PC;
619 cacheDataValid[tid] = false;
620 DPRINTF(Fetch, "Fetch: Doing instruction read.\n");
621
622 fetchedCacheLines++;
623

--- 985 unchanged lines hidden --- 		615 data_pkt->dataDynamicArray(new uint8_t[cacheBlkSize]);
616
617 cacheDataPC[tid] = block_PC;
618 cacheDataValid[tid] = false;
619 DPRINTF(Fetch, "Fetch: Doing instruction read.\n");
620
621 fetchedCacheLines++;
622

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