fetch_impl.hh (8850:ed91b534ed04) | fetch_impl.hh (8887:20ea02da9c53) |
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1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48#include <queue> 49 50#include "arch/isa_traits.hh" 51#include "arch/tlb.hh" 52#include "arch/utility.hh" 53#include "arch/vtophys.hh" 54#include "base/types.hh" 55#include "config/the_isa.hh" | 1/* 2 * Copyright (c) 2010-2011 ARM Limited 3 * All rights reserved. 4 * 5 * The license below extends only to copyright in the software and shall 6 * not be construed as granting a license to any other intellectual 7 * property including but not limited to intellectual property relating 8 * to a hardware implementation of the functionality of the software --- 39 unchanged lines hidden (view full) --- 48#include <queue> 49 50#include "arch/isa_traits.hh" 51#include "arch/tlb.hh" 52#include "arch/utility.hh" 53#include "arch/vtophys.hh" 54#include "base/types.hh" 55#include "config/the_isa.hh" |
56#include "config/use_checker.hh" | |
57#include "cpu/base.hh" | 56#include "cpu/base.hh" |
57//#include "cpu/checker/cpu.hh" |
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58#include "cpu/o3/fetch.hh" 59#include "cpu/exetrace.hh" 60#include "debug/Activity.hh" 61#include "debug/Fetch.hh" 62#include "mem/packet.hh" 63#include "mem/request.hh" 64#include "params/DerivO3CPU.hh" 65#include "sim/byteswap.hh" 66#include "sim/core.hh" 67#include "sim/eventq.hh" 68#include "sim/full_system.hh" 69#include "sim/system.hh" 70 | 58#include "cpu/o3/fetch.hh" 59#include "cpu/exetrace.hh" 60#include "debug/Activity.hh" 61#include "debug/Fetch.hh" 62#include "mem/packet.hh" 63#include "mem/request.hh" 64#include "params/DerivO3CPU.hh" 65#include "sim/byteswap.hh" 66#include "sim/core.hh" 67#include "sim/eventq.hh" 68#include "sim/full_system.hh" 69#include "sim/system.hh" 70 |
71#if USE_CHECKER 72#include "cpu/checker/cpu.hh" 73#endif // USE_CHECKER 74 | |
75using namespace std; 76 77template<class Impl> 78DefaultFetch<Impl>::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params) 79 : cpu(_cpu), 80 branchPred(params), 81 predecoder(NULL), 82 numInst(0), --- 1527 unchanged lines hidden --- | 71using namespace std; 72 73template<class Impl> 74DefaultFetch<Impl>::DefaultFetch(O3CPU *_cpu, DerivO3CPUParams *params) 75 : cpu(_cpu), 76 branchPred(params), 77 predecoder(NULL), 78 numInst(0), --- 1527 unchanged lines hidden --- |