fetch_impl.hh (8134:b01a51ff05fa) fetch_impl.hh (8137:48371b9fb929)
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 920 unchanged lines hidden (view full) ---

929 // Check squash signals from commit.
930 if (fromCommit->commitInfo[tid].squash) {
931
932 DPRINTF(Fetch, "[tid:%u]: Squashing instructions due to squash "
933 "from commit.\n",tid);
934 // In any case, squash.
935 squash(fromCommit->commitInfo[tid].pc,
936 fromCommit->commitInfo[tid].doneSeqNum,
1/*
2 * Copyright (c) 2010 ARM Limited
3 * All rights reserved.
4 *
5 * The license below extends only to copyright in the software and shall
6 * not be construed as granting a license to any other intellectual
7 * property including but not limited to intellectual property relating
8 * to a hardware implementation of the functionality of the software

--- 920 unchanged lines hidden (view full) ---

929 // Check squash signals from commit.
930 if (fromCommit->commitInfo[tid].squash) {
931
932 DPRINTF(Fetch, "[tid:%u]: Squashing instructions due to squash "
933 "from commit.\n",tid);
934 // In any case, squash.
935 squash(fromCommit->commitInfo[tid].pc,
936 fromCommit->commitInfo[tid].doneSeqNum,
937 tid);
937 fromCommit->commitInfo[tid].squashInst, tid);
938
939 // If it was a branch mispredict on a control instruction, update the
940 // branch predictor with that instruction, otherwise just kill the
941 // invalid state we generated in after sequence number
938
939 // If it was a branch mispredict on a control instruction, update the
940 // branch predictor with that instruction, otherwise just kill the
941 // invalid state we generated in after sequence number
942 assert(!fromCommit->commitInfo[tid].branchMispredict ||
943 fromCommit->commitInfo[tid].mispredictInst);
944
945 if (fromCommit->commitInfo[tid].branchMispredict &&
942 if (fromCommit->commitInfo[tid].mispredictInst &&
946 fromCommit->commitInfo[tid].mispredictInst->isControl()) {
947 branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum,
948 fromCommit->commitInfo[tid].pc,
949 fromCommit->commitInfo[tid].branchTaken,
950 tid);
951 } else {
952 branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum,
953 tid);

--- 530 unchanged lines hidden --- 		943 fromCommit->commitInfo[tid].mispredictInst->isControl()) {
944 branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum,
945 fromCommit->commitInfo[tid].pc,
946 fromCommit->commitInfo[tid].branchTaken,
947 tid);
948 } else {
949 branchPred.squash(fromCommit->commitInfo[tid].doneSeqNum,
950 tid);

--- 530 unchanged lines hidden ---